ASIC Core DFT Technical Lead – Scan, ATPG, BIST

🕒 2 dias atrás

🏄 California, Massachusetts, +2 estados a mais – Remoto

🏄 California – Remote 🍂 Massachusetts – Remote 🤠 Texas – Remote ☕ Washington – Remote

💵 $186.900 - $267.700 / ano

⏰ Tempo Integral

🟠 Sênior

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Cisco

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10.000+ funcionários

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🔧 Hardware

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Hardware • Security • Enterprise

A Cisco é uma empresa multinacional de tecnologia que fornece hardware de rede, software e serviços para empresas, provedores de serviços e governos. A empresa desenvolve roteadores, switches, transceptores ópticos, silício programável e plataformas de computação de borda, além de oferecer segurança, colaboração (Webex), observabilidade e software habilitado por IA e serviços de suporte para ajudar organizações a projetar, operar e proteger redes e data centers em larga escala. A Cisco também oferece serviços profissionais, treinamentos e soluções gerenciadas em nuvem para apoiar a transformação digital e infraestrutura preparada para IA.

Descrição

• Responsible for implementing the Hardware Design-for-Test (DFT) features that support ATE, in-system test, debug and diagnostics needs of the designs • Responsible for development of innovative DFT IP in collaboration with the multi-functional teams • Work closely with the design/design-verification and PD teams to enable the integration and validation of the Test logic in all phases of the implementation and post silicon validation flows • Your team will participate in the creation of Innovative Hardware DFT & physical design aspects for new silicon device models, bare die & stacked die

🎯 Requisitos

• Bachelors + 8 years of related experience, or Masters + 6 years of related experience, or PhD + 3 years of related experience • Experience with Jtag protocols, Scan and BIST architectures, including memory BIST, boundary scan and post silicon debug • Experience with ATPG and EDA tools like TestMax, Tetramax, Tessent tool sets, PrimeTime • Prior verification experience including, System Verilog Logic Equivalency checking and validating the Test-timing of the design • Prior experience with Tcl and Python/Perl • Verilog design experience – developing custom DFT logic & IP integration

🏖️ Benefícios

• medical, dental and vision insurance • a 401(k) plan with a Cisco matching contribution • paid parental leave • short and long-term disability coverage • basic life insurance • 10 paid holidays per full calendar year • 1 floating holiday for non-exempt employees • 1 paid day off for employee’s birthday • paid year-end holiday shutdown • 4 paid days off for personal wellness • 16 days of paid vacation time per full calendar year for non-exempt employees • flexible vacation time off program for exempt employees • 80 hours of sick time off provided on hire date and each January 1st thereafter • optional 10 paid days per full calendar year to volunteer