DFT Engineer – Verification

Emploi pas sur LinkedIn

🕒 il y a 4 mois

🇺🇸 États-Unis – Télétravail

💵 $160 000 - $220 000 / an

⏰ Temps Plein

🟡 Intermédiaire

🟠 Senior

👷🏻‍♀️ Ingénieur

🗣️🇺🇸🇬🇧 Anglais requis

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Logo of Delos Data

Delos Data

11 - 50 employés

🏭 Fabrication

💼 Conseil

📦 Logistique

Manufacturing • Consulting • Logistics

Delos Data est une entreprise spécialisée dans le développement de logiciels, de systèmes et de silicium, créant des interconnexions et infrastructures optimisées pour l'inférence de l'IA. Elle se concentre sur la distribution efficace de la puissance de calcul et de la mémoire afin d'accélérer et de rendre plus réactive l'inférence, tout en offrant une visibilité en temps réel sur une infrastructure d'IA toujours active et en positionnant leur technologie pour les déploiements d'IA en entreprise. Delos met l'accent sur la conception de réseaux et de matériel spécifiques à l'inférence plutôt que de réutiliser les solutions HPC ou de formation sur le cloud, et s'engage avec la communauté de l'IA lors d'événements comme le NVIDIA GTC.

Description

• Develop, implement, and maintain RTL verification environments using UVM or equivalent methodologies • Create and execute coverage-driven verification plans aligned with design specifications • Use EDA DFT tools (e.g., TestMax, Tessent) to create and run recommended pre-silicon test cases for MBIST and scan fabric inserted by those tools • Develop directed test cases for other (non-vendor-supplied) DFT logic to validate functionality and identify corner cases • Assist in verifying ATPG patterns, especially at SOC level, along with manufacturing reset sequences • Analyze simulation results, debug complex verification and design issues, and perform root-cause analysis in collaboration with DFT design engineers • Implement and track functional and code coverage, driving verification to closure • Develop reusable verification components and write SystemVerilog Assertions (SVA) • Participate in design and verification reviews, providing input on design testability, correctness, and optimization • Automate regression testing and enhance verification infrastructure using Python and scripting • Contribute to continuous improvement of verification processes, tools, and methodologies • Along with the DFT designers, help support post-silicon test bring-up debug

🎯 Exigences

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field • 5+ years of experience in digital design verification, with at least 2 in DFT verification specifically • Strong hands-on experience with UVM-based or similar verification methodologies • Proficiency in SystemVerilog • Experience in scripting (preferably Python) and automation • Experience with industry-standard EDA tools (e.g., Synopsys VCS, Siemens/Mentor Questa, Cadence Xcelium) • Experience with industry-standard EDA DFT tools (e.g., Synopsys TestMax + Yield Accelerator, Siemens Tessent) • Solid understanding of digital design fundamentals • Experience with verification of test sequences for high-speed PHY logic including PCIe and Ethernet (10G/40G/100G) • Strong analytical and problem-solving skills • Clear written and verbal communication skills for cross-functional collaboration • High attention to detail and ability to deliver reliable, high-quality verification outcomes • Ability to work independently and manage tasks to completion.

🏖️ Avantages

• Meaningful equity • Benefits • 401(k)

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