Analog Layout Engineer

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March 12

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Analogue Insight™

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Hardware • Telecommunications • Artificial Intelligence

Analogue Insight™ is a company established in early 2024, specializing in bridging the analogue and digital worlds through advanced Chiplet solutions. They focus on the development of cutting-edge Chiplet technology that acts as a foundational element for sophisticated communication systems. With expertise in System on Chip (SoC) architecture, Analogue Insight provides custom SoC and IP design, licensing, and various design services aimed at enhancing performance, scalability, and integration flexibility for their clients. Their services include consulting, business development, and training, all tailored to meet the complex demands of modern computation and connectivity in technology.

2 - 10 employees

Founded 2024

🔧 Hardware

📡 Telecommunications

🤖 Artificial Intelligence

📋 Description

• The Analog Layout Engineer will be part of the Engineering’s design Team responsible for the IP development and delivery for Analogue Insight’s products and custom IP development businesses. • Lead layout design activity and work closely with design team. • Produce high quality IPs/AMS Blocks/Macros. • Drive Area estimation, floor planning, placement, routing, power planning, verification, EMIR, ESD-LUP verification and tape out activity. • Mentor Junior Analog IC Layout engineers. • Develop scripts. • You will be reporting to Manager-Layout Design.

🎯 Requirements

• 5-10+ years of experience in Analog Layout. • Minimum Education requirement is bachelor's degree in electrical engineering. • Understanding of low parasitic, high frequency design techniques. • Excellent understanding of analog layout concepts and issues. • Experience in handling blocks and macros layout towards successful, high-quality, and timely execution. • Experience with planar process and lower nodes like 28/22 nm in TSMC foundry and GF. • Experience with Finfet process and lower nodes like 16/7/6 nm in TSMC foundry. • Experience with multiple foundries in lower node eg: Samsung, TSMC, GF. • Experience with Cadence tools (Virtuoso), Synopsys (CC), Calibre and ICV verification tools like LVS, DRC, Extraction etc. • Experience with EMIR, PERC tools. • Skill/TCL scripting experience.