
Hardware • Artificial Intelligence • B2B
Efficient Computer is a technology company developing ultra-energy-efficient processors and accompanying toolchains for edge and embedded computing. Their Fabric spatial dataflow processor architecture and E1 processor target extreme low-power applications (wearables, satellites, industrial sensors) while the effcc compiler enables developers to run familiar languages and AI/ML frameworks on the new hardware. The company focuses on delivering high-performance, long-lived battery operation and customers are primarily device makers and industrial/space operators.
11 - 50 employees
Founded 2022
🔧 Hardware
🤖 Artificial Intelligence
🤝 B2B
November 19
🏄 California – Remote
🔔 Pennsylvania – Remote
💵 $180k - $220k / year
⏰ Full Time
🟠 Senior
🧑🔧 Mechanical Engineer

Hardware • Artificial Intelligence • B2B
Efficient Computer is a technology company developing ultra-energy-efficient processors and accompanying toolchains for edge and embedded computing. Their Fabric spatial dataflow processor architecture and E1 processor target extreme low-power applications (wearables, satellites, industrial sensors) while the effcc compiler enables developers to run familiar languages and AI/ML frameworks on the new hardware. The company focuses on delivering high-performance, long-lived battery operation and customers are primarily device makers and industrial/space operators.
11 - 50 employees
Founded 2022
🔧 Hardware
🤖 Artificial Intelligence
🤝 B2B
• Own feature development from specification through RTL design, implementation, and synthesis. • Implement product features targeting both silicon and FPGA platforms. • Develop robust unit testbench infrastructure and contribute to verification strategies. • Design memory subsystems and integrate memory macros (SRAM, MRAM, etc.). • Integrate and interface vendor-provided IP with custom RTL designs. • Use industry-standard EDA tools across the full digital design flow (Cadence, Synopsys, Siemens/Mentor, ANSYS). • Collaborate with physical design to resolve RTL issues and ensure high-quality tape-out. • Partner with verification, software, and compiler teams to implement features that cross the hardware–software boundary, including support for Efficient’s dataflow ISA. • Produce high-quality design documentation and participate in design reviews. • Provide mentorship to junior engineers and contribute to best-practice development processes.
• 10+ years of post-graduate digital design experience, including substantial tape-out experience. • Strong proficiency in RTL design and feature implementation. • Experience running full digital design flows using industry-strength EDA tools. • Experience integrating external or vendor IP into custom RTL. • Hands-on experience with pre-silicon verification, including testbench development. • Familiarity with continuous integration flows for hardware and digital design. • Experience with version control and scripting languages (Python preferred). • Experience working with memory compiler toolchains. • Excellent attention to detail, strong communication, and ability to drive complex features independently.
• 401K match • company-paid benefits • equity program • paid parental leave • flexibility
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