RTL Engineer, FPGA

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đŸ”„ 1 minute ago

đŸ‡ș🇩 Ukraine – Remote

⏰ Full Time

🟠 Senior

🔮 Lead

🔧 Hardware Engineer

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Logo of Capgemini

Capgemini

10,000+ employees

Founded 1967

đŸ’Œ Consulting

đŸ„ Healthcare

📩 Logistics

Consulting ‱ Healthcare ‱ Logistics

Capgemini is a global leader in partnering with businesses to transform and manage their operations by harnessing the power of technology. With expertise across a wide array of industries such as aerospace, automotive, banking, and healthcare, Capgemini provides a constantly evolving portfolio of services to meet the ever-changing needs of their clients. Their offerings include cloud, cybersecurity, data and artificial intelligence, and enterprise management, among others. Capgemini also emphasizes innovation and sustainability, helping companies achieve digital transformation while promoting environmental and social responsibility. Additionally, Capgemini provides career opportunities across various levels and professions, encouraging innovation and diversity in its workforce.

📋 Description

‱ Understand design requirements, microarchitecture, and systems architecture of the team's IP and systems solutions ‱ Collaborate with design and verification engineers to understand features and support requirements ‱ Implement key functional blocks compliant with design and architecture specifications using Verilog ‱ Debug test failures to determine root cause ‱ Work with verification and emulation engineers to resolve design defects and correct design issues

🎯 Requirements

‱ B.E/M.E/M.Tech or B.S/M.S in EE/ECE with 10+ years of relevant experience in IP design ‱ Knowledge of Ethernet protocols and IEEE 802.3 standards, including MAC/PCS/PMA, PTP (IEEE 1588), pause/flow control, and FEC for speeds from 10GE up to 100GE and beyond ‱ Domain knowledge of AXI streaming, AXI4-Lite, and other connectivity protocols ‱ Experience in closing timing of complex designs ‱ Proficient in debugging firmware and RTL code using simulation tools ‱ Knowledge of ASIC flow tools such as Primetime and Design Compiler, code coverage, and LINT is an added advantage ‱ Good working knowledge of SystemVerilog ‱ Scripting language experience with Perl and Python ‱ Self-driven, motivated, and result-oriented ‱ Excellent interpersonal, written, group communication, and problem-solving skills ‱ Good organizational and execution skills, ability to multitask, prioritize, and meet deadlines with high-quality deliverables

đŸ–ïž Benefits

‱ Health insurance from the first days, regardless of the probationary period ‱ Christmas holidays from December 25 to December 31 ‱ Psychological counseling provided by the Veteran Hub ‱ Cooperation with Superhumans center and Veteran HUB ‱ Internal policy making the company friendly to military and veterans

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