Senior Design Verification Engineer

🕒 July 8

🇺🇦 Ukraine – Remote

⏰ Full Time

🟠 Senior

✍️ Designer

👻 Ghost score 41%

What it means: how likely this posting is sitting open without active hiring.How to read it: 60% or higher means we think this is a ghost. Lower scores are less of a worry.How we score it: age, reposts, open roles vs team size, how fast jobs close, and whether pay is listed.Fine print: an estimate from public data, not a judgment of the company. Real jobs can score high, so treat it as a hint, not a fact.

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Capgemini

WebsiteLinkedInAll Job Openings

10,000+ employees

Founded 1967

💼 Consulting

🏥 Healthcare

📦 Logistics

Consulting • Healthcare • Logistics

Capgemini is a global leader in partnering with businesses to transform and manage their operations by harnessing the power of technology. With expertise across a wide array of industries such as aerospace, automotive, banking, and healthcare, Capgemini provides a constantly evolving portfolio of services to meet the ever-changing needs of their clients. Their offerings include cloud, cybersecurity, data and artificial intelligence, and enterprise management, among others. Capgemini also emphasizes innovation and sustainability, helping companies achieve digital transformation while promoting environmental and social responsibility. Additionally, Capgemini provides career opportunities across various levels and professions, encouraging innovation and diversity in its workforce.

📋 Description

• Own verification of IPs and SoCs in prototype and SoC design environments • Establish functional and performance benchmarks • Lead the definition, execution, and continuous improvement of a robust design verification methodology and tools flow across different verification platforms • Perform IP and SoC design verification from RTL level to emulation • Deliver fully functional and performant IPs/SoCs • Work on projects with Ukrainian engineers • Participate in daily knowledge sharing with senior staff

🎯 Requirements

• Sound knowledge of SystemVerilog • Good experience in Constrained Random and Coverage Driven Verification with UVM/OVM • Experience in creating any UVC components or sequences is a must • Basic knowledge of at least two of: AHB/AXI, PCIe/CXL, USB, DDR, Serial protocols, Processor Verification • Expertise in one protocol is a must for Senior and above • Comfortable updating existing verification environments for feature updates • Bring-up/Architect UVM-based test bench from scratch is a strong plus • EDA simulation/debugging tools agnostic • Good knowledge of Perl/TCL/Python scripting • Domain expertise in one of: CPU processor/server, multimedia, automotive, Ethernet, Mobile • Experienced Professionals level

🏖️ Benefits

• Competitive Salary & Benefits • Knowledge and support from more experienced engineers • Respect for your private life and your choices • All tools required for high performance in your field • Responsible approach, long term commitments, and stability • Health insurance from the first days, regardless of the probationary period • Christmas holidays from December 25 to December 31 • Psychological counseling provided by the Veteran Hub • Support for military and veterans through an internal policy • Cooperation with Superhumans center and Veteran HUB