Senior Design Verification Engineer

🕒 July 8

🇺🇦 Ukraine – Remote

⏰ Full Time

🟠 Senior

✍️ Designer

👻 Ghost score 20%

What it means: how likely this posting is sitting open without active hiring.How to read it: 60% or higher means we think this is a ghost. Lower scores are less of a worry.How we score it: age, reposts, open roles vs team size, how fast jobs close, and whether pay is listed.Fine print: an estimate from public data, not a judgment of the company. Real jobs can score high, so treat it as a hint, not a fact.

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Capgemini

WebsiteLinkedInAll Job Openings

10,000+ employees

Founded 1967

💼 Consulting

🏥 Healthcare

📦 Logistics

Consulting • Healthcare • Logistics

Capgemini is a global leader in partnering with businesses to transform and manage their operations by harnessing the power of technology. With expertise across a wide array of industries such as aerospace, automotive, banking, and healthcare, Capgemini provides a constantly evolving portfolio of services to meet the ever-changing needs of their clients. Their offerings include cloud, cybersecurity, data and artificial intelligence, and enterprise management, among others. Capgemini also emphasizes innovation and sustainability, helping companies achieve digital transformation while promoting environmental and social responsibility. Additionally, Capgemini provides career opportunities across various levels and professions, encouraging innovation and diversity in its workforce.

📋 Description

• Own verification of IP’s and SoC’s in prototype and SoC design environment; • Establish functional and performance benchmarks; • Lead the definition, execution, and continuous improvement of a robust design verification (DV) methodology and tools flow across different verification platforms; • IP and SoC design verification (DV), from the RTL level to emulation, resulting in fully functional and performant IP’s/SoC’s.

🎯 Requirements

• Sound knowledge of SystemVerilog, and good experience in Constrained Random and Coverage Driven Verification with UVM/OVM • Experience in creating any UVC components or sequences is a must • Basic knowledge on at least two of these: AHB/AXI, PCIe/CXL, USB, DDR, Serial protocols, Processor Verification etc. Expertise in one protocol is a must for Senior and above. • Should be comfortable in updating the existing verification environment for feature updates. (Bring-up/Architect UVM based Test bench from Scratch is a strong plus) • EDA simulation/debugging tools agnostic. • Good knowledge of Perl/TCL/Python scripting. • Domain expertise on any one of these for senior and above: CPU processor/server, multimedia, automotive, Ethernet, Mobile

🏖️ Benefits

• Competitive Salary & Benefits • Knowledge and support from more experienced engineers • Respect for your private life and your choices • All tools required for high performance in your field • Responsible approach, long term commitments, and stability • Health insurance from the first days regardless of the probationary period • Christmas holidays from December 25 to December 31 • Cooperation with Superhumans center and Veteran HUB