ASIC Design Engineer

🔥 14 hours ago

🇨🇷 Costa Rica – Remote

⏰ Full Time

🟡 Mid-level

🟠 Senior

🧑‍🔧 Mechanical Engineer

👻 Ghost score 15%

What it means: how likely this posting is sitting open without active hiring.How to read it: 60% or higher means we think this is a ghost. Lower scores are less of a worry.How we score it: age, reposts, open roles vs team size, how fast jobs close, and whether pay is listed.Fine print: an estimate from public data, not a judgment of the company. Real jobs can score high, so treat it as a hint, not a fact.

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Cornelis Networks

WebsiteLinkedInAll Job Openings

51 - 200 employees

🤖 Artificial Intelligence

🔧 Hardware

🏢 Enterprise

💰 $29M Series B on 2022-11

Artificial Intelligence • Hardware • Enterprise

Cornelis Networks is a leading provider of intelligent, scalable, high-performance interconnects designed for AI applications. The company specializes in delivering end-to-end purpose-built high-performance fabrics to commercial, scientific, academic, and government organizations. Cornelis Networks’ solutions are aimed at enhancing performance, scalability, and efficiency across hyperscale, cloud AI, and on-premises AI/HPC environments. Their offerings are known for scalable architecture, high bandwidth solutions, and universal compatibility with accelerators and GPUs. Originating as an Intel spin-off, the company is positioned to challenge existing technologies like InfiniBand and Ethernet, providing advanced interconnects that power modern AI infrastructure.

📋 Description

• Implement advanced Ethernet protocols for next-generation Ethernet ASICs • Write microarchitecture specifications • Define timing constraints for RTL blocks and work with Physical Design engineers on timing optimization • Work with verification engineers to create block- and system-level test plans and ensure adequate design coverage • Work with hardware, firmware, and software engineers to resolve post-silicon ASIC issues

🎯 Requirements

• B.S. or M.S. degree in Computer or Electrical Engineering • 3+ years of post-college experience in digital design • Proficiency in Verilog and System Verilog • Relevant experience in timing closure • Familiarity with modern physical design methodologies • Demonstrated strength with system-level debugging and determining root cause of technical issues • Strong verbal and written communication skills • Preferred: Experience with Ethernet architecture and networking protocols • Preferred: Familiarity and experience in designing Ethernet protocols applicable to Ethernet adapters and switches • Preferred: Experience with multiple-clock designs and asynchronous interfaces

🏖️ Benefits

• Performance incentives • Equity participation • Additional benefits depending on geographic location • Paid holidays depending on geographic location • Flexible work arrangements depending on geographic location