High-Speed Analog Layout Engineer

Job not on LinkedIn

🔥 1 minute ago

🤠 Texas – Remote

🤠 Texas – Remote

⏳ Contract/Temporary

🟡 Mid-level

🟠 Senior

👷🏻‍♀️ Engineer

👻 Ghost score 25%

What it means: the chance that no one is really hiring for this job.How to read it: 60% or higher means we think this is a ghost. Lower scores are less of a worry.Why this score:

• Just posted.
• Jobs at this company usually fill in 22 days.
• 36 open roles for a team of 46.
• No salary listed.

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3Core Systems, Inc

WebsiteLinkedInAll Job Openings

51 - 200 employees

Founded 2004

🤝 B2B

💼 Consulting

👥 HR Tech

B2B • Consulting • HR Tech

3Core Systems, Inc. is an SAP Silver Partner specializing in the delivery of integrated Digital HR solutions. The company focuses on optimizing SAP SuccessFactors for HR organizations, helping them solve immediate pain points while transforming their business objectives to achieve key performance indicators (KPIs). 3Core Systems provides a range of services including implementation, project management, consulting, and application management support, tailored to improve the efficiency of HR processes and enhance overall performance.

📋 Description

• Design physical silicon layouts for high-frequency or high-speed mixed-signal circuits, including SerDes, ADCs, DACs, PLLs, and high-speed blocks • Create block-level and chip-top-level floor plans • Manage hierarchical block integration • Handle micro-bump or package-aware co-design • Address layout-dependent effects, device matching, common-centroid structures, guard rings, isolation, and shielding • Ensure closure on DRC, LVS, ERC, antenna rules, EM/IR reliability, and ESD protection

🎯 Requirements

• Must have TSMC 4NM experience • Generally 5 to 12+ years of hands-on custom IC layout experience • Experience in deep sub-micron or advanced CMOS/FinFET nodes • Experience with advanced nodes such as TSMC N3, N5, or N7 • Experience at lower nodes (N3, N5) is critical • Experience designing physical silicon layout for high-frequency or high-speed mixed-signal circuits • Knowledge of floor planning and hierarchical block integration • Experience with micro-bump or package-aware co-design • Knowledge of layout-dependent effects (LOD, WPE, LDE) • Expertise in device matching and common-centroid structures • Experience with guard rings, isolation, and shielding, including coaxial, differential, and ground shields • Experience closing DRC, LVS, ERC, antenna rules, EM/IR reliability, and ESD protection

🏖️ Benefits

• Contract engagement for 6–12 months

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