Hardware ASIC Packaging SI/PI Simulation and Design Lead

🔥 5 minutes ago

🏄 California – Remote

🏄 California – Remote

💵 $186.9k - $267.7k / year

⏰ Full Time

🟠 Senior

🎨 Product Designer (UI/UX)

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Cisco

WebsiteLinkedInAll Job Openings

10,000+ employees

Founded 1984

🔧 Hardware

🔐 Security

🏢 Enterprise

Hardware • Security • Enterprise

Cisco is a multinational technology company that provides networking hardware, software, and services to enterprises, service providers, and governments. It builds routers, switches, optical transceivers, programmable silicon, and edge computing platforms, and offers security, collaboration (Webex), observability, and AI-enabled software and support services to help organizations design, operate, and secure large-scale networks and data centers. Cisco also delivers professional services, training, and cloud-managed solutions to support digital transformation and AI-ready infrastructure.

📋 Description

• Develop, document, and implement design rules for ultra-high-speed signaling • Analyze substrate signal integrity and power integrity across interposer, substrate, and PCB • Collaborate with layout teams to develop optimal SI/PI solutions • Design, document, and develop ASIC packages for high-volume, high-quality release • Perform post-layout extraction and reporting • Collaborate with system partners, vendors, and design leads to resolve complex technical issues • Define processes, methods, and tools for complex ASIC/package development • Lead or participate in chip architecture discussions and high-performance ASIC definition, architecture, and design • Review intricate IC and analog/mixed-signal circuit designs • Mentor and support signal integrity team members and junior engineers • Influence packaging and hardware teams to meet technical specifications and develop innovative solutions • Promote design reviews, postmortems, and continuous improvement across multidisciplinary engineering teams

🎯 Requirements

• Bachelor's degree in Electrical Engineering and 8+ years of relevant signal and power integrity experience, or Master's degree in Electrical Engineering and 6+ years of relevant experience, or PhD in Electrical Engineering and 3+ years of relevant experience • Experience with high-speed design principles, including Transmission Line Theory, electromagnetics, scattering parameters, and impedance network analysis • Experience applied to 56G PAM4 SerDes architectures, channel modeling, and BER prediction • Pre- and post-layout SI/PI simulation experience using Cadence Sigrity, Ansys HFSS, and Keysight ADS • Detailed layout review and physical design validation experience using Cadence APD and Ansys EM flows • SPICE experience for circuit-level analysis, signal modeling, and performance validation • Preferred: ability to articulate technical concepts to diverse audiences verbally and in writing • Preferred: HBM or high-speed memory interface SI experience • Preferred: UCIe or proprietary die-to-die interface experience • Preferred: advanced packaging experience, including CoWoS, EMIB, and interposer-based 2.5D ASIC packaging • Preferred: Vector Network Analysis experience • Preferred: IBIS experience

🏖️ Benefits

• Medical, dental and vision insurance • 401(k) plan with a Cisco matching contribution • Paid parental leave • Short- and long-term disability coverage • Basic life insurance • Cisco restricted stock unit grants may be available • 10 paid holidays per full calendar year • 1 floating holiday for non-exempt employees • 1 paid day off for employee’s birthday • Paid year-end holiday shutdown • 4 paid days off for personal wellness • 16 days of paid vacation per full calendar year for non-exempt employees • Flexible vacation time off program with no defined limit for eligible exempt employees • 80 hours of sick time off provided on hire date and each January 1st • Up to 80 hours of unused sick time carried forward • Additional paid time away for critical or emergency family issues • Optional 10 paid volunteer days per full calendar year • Annual bonuses for non-sales roles, subject to Cisco policies