Silicon Physical Design Engineer V

Job not on LinkedIn

🔥 5 minutes ago

🇺🇸 United States – Remote

💵 $75 - $115 / hour

⏳ Contract/Temporary

🟠 Senior

🔴 Lead

🧑‍🔧 Mechanical Engineer

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Fresh Consulting

WebsiteLinkedInAll Job Openings

201 - 500 employees

Founded 2007

💼 Consulting

🤖 Artificial Intelligence

🏥 Healthcare

Consulting • Artificial Intelligence • Healthcare

Fresh Consulting is an innovation services firm that specializes in helping organizations grow by designing and building products, systems, teams, and experiences. Their holistic capabilities include strategy, design, software, and hardware development, making them an end-to-end partner for innovation across various sectors, including healthcare, technology, and fintech.

📋 Description

• Set up and maintain PPRTL and PTPX power analysis flows for average and time-based/peak power • Generate and manage activity inputs (FSDB/VCD/SAIF) from RTL and gate-level simulations • Handle long-waveform and windowed analysis • Correlate RTL-level power estimates against gate-level signoff power and explain deltas • Produce per-block, per-hierarchy, and per-workload power breakdowns • Identify top power contributors and clock/datapath waste • Recommend and evaluate power reduction opportunities, including clock gating efficiency, datapath gating, memory power, and idle leakage • Automate flows and reporting with TCL, Python, and Make-based build systems • Integrate automation into regression/CI • Document methodology and support design teams in interpreting results • Perform PPA optimization with Fusion Compiler • Perform RTL and netlist-level power analysis • Post-process and script report log files for format conversion, data analysis, and information extraction • Set up, run, debug, and analyze ASIC flows including synthesis, physical design, power, and timing • Implement select blocks at RTL and UPF • Document and communicate findings clearly

🎯 Requirements

• 10+ years of experience as an ASIC Power Engineer, CAD Engineer, or Physical Design Engineer • Experience with power estimation tools and synthesis, plus some physical design • Knowledge of power trade-offs in design and back-end implementation • Hands-on experience in scripting and data analysis • Hands-on production experience with Synopsys (PPRTL, PTPX/PrimePower, VCS, Verdi, DC, ICC, FC) and/or Cadence (Joules), PowerArtist • Ability to debug simulation-to-power flow issues end to end • Strong scripting skills: TCL, Python, and Excel-based scripting and data post-processing tools, model fitting, data visualization and analysis • Comfortable with Linux and large compute/job-scheduling environments • Experience in low power design, tools, and methodologies, including UPF power intent specifications • Silicon power characterization, including some power modeling/profiling experience at the IP/SoC level • Interest or experience in machine learning hardware for AR/VR products • BS in Electrical Engineering, Computer Science, or equivalent experience • Must work Pacific Time (PST) hours

🏖️ Benefits

• Employee benefits at 100% including Medical • PTO • Holiday Pay • 401K Plan

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