
51 - 200 employees
Founded 2006
💳 Fintech
🔒 Cybersecurity
☁️ SaaS
Fintech • Cybersecurity • SaaS
Inabia Solutions and Consulting, Inc. is a global business enterprise that specializes in providing IT and business solutions to organizations worldwide since 2006. With expertise in areas such as software development, cybersecurity, and artificial intelligence, Inabia focuses on empowering businesses through innovative technology and tailored consulting services. The company prides itself on connecting organizations with top-tier talent and delivering high-quality managed services to enhance operational efficiency and drive growth.
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51 - 200 employees
Founded 2006
💳 Fintech
🔒 Cybersecurity
☁️ SaaS
Fintech • Cybersecurity • SaaS
Inabia Solutions and Consulting, Inc. is a global business enterprise that specializes in providing IT and business solutions to organizations worldwide since 2006. With expertise in areas such as software development, cybersecurity, and artificial intelligence, Inabia focuses on empowering businesses through innovative technology and tailored consulting services. The company prides itself on connecting organizations with top-tier talent and delivering high-quality managed services to enhance operational efficiency and drive growth.
• Own micro-architecture definition derived from high-level functional specifications • Develop and implement RTL for complex digital blocks using SystemVerilog/Verilog • Drive digital block control logic and IP integration • Participate in subsystem-level architecture alignment discussions • Support design sign-off activities including CDC, RDC, lint, and synthesis readiness checks • Collaborate closely with Design Verification (DV) teams for closure and debug • Take full project lifecycle ownership with minimal supervision
• Strong, current expertise in RTL design using SystemVerilog and/or Verilog • Demonstrated ability to independently define micro-architecture from functional specs • Recent hands-on experience designing custom RTL blocks such as controllers, DMAs, or SoC bus bridges • Solid understanding of memory controllers, including HBM, DDR4, or DDR5 • Experience with SoC integration and digital subsystem design • Proficiency with IP integration and block-level ownership • Working knowledge of sign-off flows including CDC (Clock Domain Crossing) and RDC (Reset Domain Crossing) • Experience designing IPs with multiple clock domains • Ability to operate independently with no ramp-up time required
• Flexible work arrangements
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