Senior ASIC Package Design Engineer

🔥 13 minutes ago

🇺🇸 United States – Remote

💵 $180k - $260k / year

⏰ Full Time

🟠 Senior

🧑‍🔧 Mechanical Engineer

👻 Ghost score 21%

What it means: the chance that no one is really hiring for this job.How to read it: 60% or higher means we think this is a ghost. Lower scores are less of a worry.Why this score:

• Just posted.
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• 17 open roles for a team of 34.

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K2 Space Corporation

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🎖️ Defense

📦 Logistics

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Defense • Logistics • Manufacturing

K2 Space Corporation is a California-based aerospace manufacturer that designs and produces large, high-power satellite buses intended to deliver significantly more power, mass and payload volume at lower cost than traditional large satellites. The company emphasizes production-line style builds and commercial supply chains to shorten lead times and reduce per-unit cost, enabling multi-manifest launches and multi-orbit missions across LEO, MEO, GEO and cislunar space. K2 serves commercial, scientific and government/defense customers, and focuses on enabling missions that require high throughput, high-power payloads.

📋 Description

• Define ASIC package architecture for FC-BGA and MCM solutions, including substrate stack-up, ball-map strategy, power delivery, signal breakout, and mechanical constraints. • Lead package-level trade studies across cost, performance, power integrity, signal integrity, thermal, manufacturability, and reliability. • Establish package design standards, methodologies, and best practices. • Drive detailed design of FC-BGA packages for high-pin-count ASICs with high-speed SerDes, dense power grids, and RF signal content. • Define and review substrate stack-ups, via strategies, impedance control, escape routing, and reference plane planning. • Partner with silicon, RF, and systems teams to co-optimize die floorplans and package interfaces. • Support package-level SI/PI strategy, including high-speed digital interfaces, power delivery network design, and decoupling strategy. • Lead thermal architecture at the package level, including lid selection, TIMs, heat-spreaders, and mechanical interfaces to system cooling. • Manage relationships with external packaging vendors, substrate suppliers, and OSATs. • Drive material selection, substrate technology choices, and assembly process optimization. • Support end-to-end package strategy from early architecture and trade studies through vendor engagement, qualification, and production ramp. • Define standards, influence silicon and system architecture, and ensure first-pass success for complex, high-speed, power-dense ASICs.

🎯 Requirements

• Bachelor’s degree in Packaging Engineering, Mechanical Engineering, Electrical Engineering, or a related field. • 5+ years of experience in ASIC package design, with deep expertise in FC-BGA. • Proven experience delivering high-pin-count, high-performance ASIC packages into production. • Strong understanding of substrate technologies and materials, SI/PI fundamentals at the package level, and thermal management for power-dense ASICs. • Fluent in SI/PI and EM simulation tools such as SIWave, HFSS, and ADS. • Experience working directly with OSATs and substrate vendors. • Knowledge of packaging qualification and test methodologies. • U.S. person status as defined by ITAR or eligibility for a federally issued export control license. • Experience with MCM or heterogeneous integration (chiplets, interposers, advanced laminates) is nice to have. • Background in high-speed digital or mixed-signal SoCs is nice to have. • Familiarity with aerospace, space, or high-reliability electronics is nice to have.

🏖️ Benefits

• Equity in the company • Comprehensive benefits package • Paid time off • Medical coverage • Dental coverage • Vision coverage • Life insurance • Paid parental leave • Many other perks

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