FPGA Design Engineer

🕒 April 14

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Logo of Arista Networks

Arista Networks

1001 - 5000 employees

Founded 2004

🏢 Enterprise

📡 Telecommunications

💰 $2.6M Post-IPO Debt on 2015-05

Enterprise • Telecommunications • Cloud

Arista Networks is a leader in building scalable high-performance and ultra-low-latency networks for modern data center and cloud computing environments. The company offers a wide range of networking solutions including the Arista Extensible Operating System (EOS) for cloud networking, CloudVision for network automation and observability, and a variety of high-performance switches and routing platforms. Arista's solutions are designed for enterprise WANs, cloud-grade routing, multi-domain segmentation, security, and modern network operating models, making them a pivotal choice for hyperscale data centers and cloud environments.

📋 Description

• Design and implement digital logic using VHDL for FPGAs. • Develop and optimise high-speed, low-latency FPGA designs targeting AMD/Xilinx Ultrascale Plus devices. • Integrate FPGA modules with embedded systems, processors, and high-speed interfaces (e.g., PCIe, Ethernet, HBM, DDR4, AXI). • Perform functional simulation, synthesis, place-and-route, timing analysis, and optimization using industry-standard EDA tools (e.g. Vivado, ModelSim). • Leverage industry-standard development tools and workflows to manage work, code changes, testing and integration (e.g. Jira, Git, CI/CD). • Create and maintain both internal and customer facing documentation including design specifications, test plans, and user guides. • Work closely with hardware, software and account teams to define technical requirements and business needs. • Support platform bring-up, validation, and debugging in the lab using test equipment such as oscilloscopes, logic analyzers, and JTAG tools. • Contribute to continuous improvement of FPGA development processes, methodologies and design practices.

🎯 Requirements

• Bachelor’s or higher degree in Electrical Engineering, Computer Engineering, or related field. • 5+ years of experience in FPGA or ASIC design and development. • Proficiency in a hardware description language (HDL) such as VHDL or Verilog. • Experience with FPGA development tools (Vivado, Quartus, etc.). • Strong understanding of digital logic, high-speed design, and timing closure. • Candidates must be based in Poland. Please clearly state your current work authorization status in your application.

🏖️ Benefits

• Competitive salary • Flexible working hours • Professional development opportunities

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