Senior DFT Engineer

🕒 March 12

đŸ‡ș🇩 Ukraine – Remote

⏰ Full Time

🟠 Senior

đŸ‘·đŸ»â€â™€ïž Engineer

Where this job comes from

Posted on Capgemini's careers page ↗Capgemini's careers page, not through a job board

First seen by Remote Rocketship March 12

Still open on Capgemini's site. Checked 5 hours ago.

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Logo of Capgemini

Capgemini

10,000+ employees

Founded 1967

đŸ’Œ Consulting

đŸ„ Healthcare

📩 Logistics

Consulting ‱ Healthcare ‱ Logistics

Capgemini is a global leader in partnering with businesses to transform and manage their operations by harnessing the power of technology. With expertise across a wide array of industries such as aerospace, automotive, banking, and healthcare, Capgemini provides a constantly evolving portfolio of services to meet the ever-changing needs of their clients. Their offerings include cloud, cybersecurity, data and artificial intelligence, and enterprise management, among others. Capgemini also emphasizes innovation and sustainability, helping companies achieve digital transformation while promoting environmental and social responsibility. Additionally, Capgemini provides career opportunities across various levels and professions, encouraging innovation and diversity in its workforce.

📋 Description

‱ Implement DFT in line with existing test methodology for advanced process nodes ‱ Perform top-level and/or block-level DFT insertion, including scan compression, (i)JTAG, ATPG, pattern validation/simulation, MBIST, and LBIST ‱ Work closely with the physical design team to resolve timing constraints and issues ‱ Verify DFT circuitry and interface with other components and IPs ‱ Debug timing simulation issues ‱ Debug and improve DFT KPIs, including test coverage and pattern efficiency ‱ Perform hierarchical retargeting ‱ Support silicon bring-up, diagnosis, and physical failure analysis ‱ Participate in knowledge sharing with Ukrainian engineering teams

🎯 Requirements

‱ 5+ years of hands-on experience with DFT and test flows with commercial EDA tools for large and complex SOCs ‱ Strong fundamental knowledge of DFT techniques including JTAG, ATPG, yield learning, logic diagnosis, scan compression, IEEE 1500 Standard, and MBIST/LBIST ‱ Experience with Synopsys DFT Compiler, Tetramax, VCS, Tessent, and Modus/Encounter tool suites ‱ Experience in RTL simulation, synthesis, linting, CDC and RDC checks, STA, DFT, and quality metrics is a plus ‱ Hands-on experience with Perl, Tcl, and Python scripting ‱ Excellent analytical and problem-solving skills ‱ Knowledge of hierarchical DFT, DFT partitioning, ATPG, BIST, LBIST, boundary scan, memory repair, TAP controller, test coverage, IDDQ, HTOL, PVT corners, DFT strategy documentation, DFT architecture tradeoffs, DFT for chiplets, wafer debug, and yield management ‱ Experience with DFT EDA tools including Tessent and TestMAX ‱ Ability to support product and test engineers

đŸ–ïž Benefits

‱ Health insurance from the first days, regardless of the probationary period ‱ Christmas holidays from December 25 to December 31 ‱ Psychological counseling provided by the Veteran Hub ‱ Internal policy making the company friendly to military and veterans ‱ Cooperation with Superhumans center and Veteran HUB

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