Signal and Power Integrity Engineer

🔥 4 minutes ago

🌐 Israel, United Kingdom, +4 more countries – Remote

🇮🇱 Israel – Remote 🇬🇧 United Kingdom – Remote 🇫🇷 France – Remote 🇩🇪 Germany – Remote 🇳🇱 Netherlands – Remote 🇲🇽 Mexico – Remote

⏳ Contract/Temporary

🟠 Senior

🔴 Lead

👷🏻‍♀️ Engineer

👻 Ghost score 10%

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SPD Technology

WebsiteLinkedInAll Job Openings

501 - 1000 employees

Founded 2006

💳 Fintech

🤖 Artificial Intelligence

🤝 B2B

Fintech • Artificial Intelligence • B2B

SPD Technology is a global software product development company that delivers custom digital platforms, cloud and DevOps, AI/ML, and fintech/payment solutions. They specialize in application modernization, data analytics and engineering, system integration and APIs, security and quality engineering, and mobile/web UX/UI development. SPD works as a B2B partner for enterprise and growth-stage clients (notable customers cited include PitchBook and Poynt), focusing on building payment systems, billing and fraud-detection software, data platforms, and AI-enabled products for industries such as fintech, insurance, healthcare, and e-commerce.

📋 Description

• Lead signal integrity (SI) and power integrity (PI) analysis and optimization for High-Performance Computing (HPC) using advanced 2.5D/3D packaging technologies • Partner early in product definition to influence chip floorplanning, power distribution networks, power trees, netlists, and routability tradeoffs • Evaluate high-speed interface IPs and develop next-generation memory interfaces across IO PHY, SI/PI, and physical design boundaries • Drive post-silicon validation and qualification for NPI • Balance SI/PI performance and DFM constraints to achieve final package design closure • Partner with silicon, system, and external vendor teams • Develop simulation methodologies to improve modeling accuracy and efficiency • Collaborate with Chip Design, IP, System Design, software, and vendor teams

🎯 Requirements

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience • 8 years of experience in SI/PI design for chip/package or system PCB • Experience in industry SIPI modeling tool chains, such as HFSS, ADS, Sigrity, and Siwave • Experience with lab bring-up, test environments, and characterization for high-speed memory and SerDes • Experience partnering across chip architecture, physical design, static timing analysis (STA), package, and validation teams • Experience in Python, MATLAB, or C++ for automated flows and data processing tools • Deep knowledge of SI/PI analysis for high-speed interconnects such as HBMx, D2D/chiplets, PCIe, and SerDes, and timing budget methodologies • Direct experience with silicon interposers, silicon bridges, and 3D die stacking architectures is a bonus • Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture, is a bonus

🏖️ Benefits

• Fully remote around the globe or hybrid work model from office hubs • Flexible working schedule • Stable workload and stable income • Performance review and career path • Mentorship program • Personal development plan • Individual learnings through the corporate library • Public speaking support • Company-wide tech and cultural events • Meaningful CSR initiatives • Supportive and flexible work environment • Collaboration, open communication and mutual respect