Principal FPGA Networking Engineer

🔥 0 minutes ago

🇺🇸 United States – Remote

💵 $91k - $216k / year

⏰ Full Time

🔴 Lead

👷🏻‍♀️ Engineer

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GE Aerospace

WebsiteLinkedInAll Job Openings

10,000+ employees

🚀 Aerospace

🏭 Manufacturing

🎖️ Defense

💰 $2G Post-IPO Debt - GE Aerospace on 2025-07

Aerospace • Manufacturing • Defense

GE Aerospace is a world-leading provider of jet and turboprop engines, aircraft components, and integrated systems for commercial, military, business, and general aviation. The company designs, manufactures, and services aircraft engines and related systems (avionics, mechanical systems, integrated power systems), and provides aftermarket support including engine maintenance, parts (Unison products), materials and asset management. GE Aerospace serves both civil and defense markets and focuses on performance-based navigation and comprehensive aftermarket services.

📋 Description

• Architect, implement, and verify FPGA-based networking solutions for space-based electronic systems • Design on-board networking, data transport, RF, processing, and data storage solutions using AMD (Xilinx) technologies • Architect networking pipelines covering Ethernet MAC/PHY integration, packet parsing/classification, switching/forwarding, buffering, and QoS • Design packet-switching fabrics, router/switch datapaths, control logic, and buffering/queuing schemes • Create and maintain FPGA designs using VHDL and Vivado IP Integrator • Code, simulate, and verify Ethernet interfaces, packet-processing blocks, switching/routing/queuing logic, and control interfaces • Implement solutions using embedded ARM processors, DDR4 memory, and high-speed serial interfaces such as Aurora, PCIe, and multi-rate Ethernet • Implement and optimize hardware support for IP, TCP/UDP, VLAN, and QoS, including offload engines and checksum/segmentation logic • Develop and maintain simulation testbenches • Define timing constraints and perform timing closure for multi-clock, multi-interface designs • Produce design documentation, interface control documents, and performance characterization reports • Participate in code and design reviews and contribute to FPGA design methodologies • Collaborate with hardware and software engineers to integrate FPGA networking designs with system hardware, drivers, and networking stacks • Support board bring-up and system verification, including link bring-up, traffic generation, protocol compliance testing, performance evaluation, and FPGA ILA-based debugging • Mentor junior engineers in FPGA networking architecture, protocol implementation, buffering/queuing, and verification practices

🎯 Requirements

• Bachelor’s degree in Computer Engineering, Electrical Engineering, or related technical degree • 9+ years of related experience with a bachelor’s degree OR 7+ years of experience with a master’s degree • Hands-on experience with FPGA-based networking design, including Ethernet (IEEE 802.3), high-speed serial links, and packet-switched architectures • Experience implementing or integrating networking protocols and functions in hardware, including IP, TCP/UDP, VLAN, QoS, router/switch datapaths, and routing look-up tables • Experience with firmware/RTL design, simulation, and verification for complex, high-throughput FPGA systems • Experience with RTL logic design and coding using VHDL and/or Verilog • Thorough understanding of FPGA design methodology, including physical synthesis, static timing analysis, place/route, verification, power analysis, and timing closure techniques • Experience writing simulation testbenches • Preferred: deep understanding of data networking architectures, routers, switches, and network management concepts • Preferred: experience with high-speed Ethernet interfaces, including 100G Ethernet • Preferred: experience with multi-level security networking concepts and architectures • Preferred: experience with IPsec and MACsec • Preferred: experience designing and verifying hardware buffering and queuing schemes, including FIFOs, circular buffers, and priority queues • Preferred: experience with networking test and qualification, including performance and protocol compliance testing • Preferred: experience with AMD (Xilinx) SoC/FPGA devices and Vivado Design Suite • Preferred: experience with Vivado IP Integrator • Preferred: experience with Microsemi (Microchip) FPGAs and Libero • Preferred: experience with ModelSim/QuestaSim and/or Aldec simulation tools • Preferred: experience with UVVM, UVM, OVM, or similar simulation verification libraries • Preferred: experience with board bring-up, electronic lab equipment, and FPGA ILA-based debugging tools • Preferred: experience with revision control systems such as Git • Experience with Linux • Experience with C/C++ • Ability to contribute independently and within a distributed team

🏖️ Benefits

• Health benefits • Medical • Dental • Vision • Basic life with AD&D • Short term disability • Long term disability • Ancillary benefits: voluntary life with AD&D, accident, critical illness, hospital, and pet • Spending accounts: HSA, FSA, and DCFSA • Paid time off • Holidays • 401(k), including company match • Tuition reimbursement • Parental, maternity, and military leaves • Annual discretionary bonus for eligible roles