
51 - 200 employees
đ¤ Artificial Intelligence
đ§ Hardware
đ˘ Enterprise
đ° $29M Series B on 2022-11
Artificial Intelligence ⢠Hardware ⢠Enterprise
Cornelis Networks is a leading provider of intelligent, scalable, high-performance interconnects designed for AI applications. The company specializes in delivering end-to-end purpose-built high-performance fabrics to commercial, scientific, academic, and government organizations. Cornelis Networksâ solutions are aimed at enhancing performance, scalability, and efficiency across hyperscale, cloud AI, and on-premises AI/HPC environments. Their offerings are known for scalable architecture, high bandwidth solutions, and universal compatibility with accelerators and GPUs. Originating as an Intel spin-off, the company is positioned to challenge existing technologies like InfiniBand and Ethernet, providing advanced interconnects that power modern AI infrastructure.
đ May 8
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51 - 200 employees
đ¤ Artificial Intelligence
đ§ Hardware
đ˘ Enterprise
đ° $29M Series B on 2022-11
Artificial Intelligence ⢠Hardware ⢠Enterprise
Cornelis Networks is a leading provider of intelligent, scalable, high-performance interconnects designed for AI applications. The company specializes in delivering end-to-end purpose-built high-performance fabrics to commercial, scientific, academic, and government organizations. Cornelis Networksâ solutions are aimed at enhancing performance, scalability, and efficiency across hyperscale, cloud AI, and on-premises AI/HPC environments. Their offerings are known for scalable architecture, high bandwidth solutions, and universal compatibility with accelerators and GPUs. Originating as an Intel spin-off, the company is positioned to challenge existing technologies like InfiniBand and Ethernet, providing advanced interconnects that power modern AI infrastructure.
⢠Implement RTL designs using Verilog/System Verilog for high-speed data paths and packet processing logic ⢠Collaborate with verification engineers to create block- and system-level test plans to ensure comprehensive design coverage ⢠Define timing constraints for RTL blocks and work with Physical Design engineers to optimize timing closure ⢠Support post-silicon validation, collaborating with hardware, firmware, and software teams to debug and resolve ASIC issues ⢠Contribute to performance optimization and power-aware design strategies for Host Fabric Interface subsystems
⢠B.S. or M.S. degree in Computer Engineering, Electrical Engineering, or related field ⢠8+ years of post-college experience in digital design with proficiency in Verilog and System Verilog ⢠Experience in RTL design for high-speed data paths or packet processing in ASICs ⢠Deep understanding of Host Ethernet adaptor architectures ⢠Familiarity with timing closure and modern physical design methodologies ⢠Proven ability in system-level debug and root cause analysis of technical issues ⢠Strong verbal and written communication skills
⢠health and retirement benefits ⢠equity, cash, and incentives ⢠medical, dental, and vision coverage ⢠disability and life insurance ⢠dependent care flexible spending account ⢠accidental injury insurance ⢠pet insurance ⢠generous paid holidays ⢠401(k) with company match ⢠Open Time Off (OTO) ⢠sick time ⢠bonding leave ⢠pregnancy disability leave
Apply Nowđ May 7
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