Principal ASIC Package Design Engineer

🕒 April 13

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K2 Space Corporation

WebsiteLinkedInAll Job Openings

11 - 50 employees

Founded 2022

🚀 Aerospace

🔧 Hardware

🏛️ Government

Aerospace • Hardware • Government

K2 Space Corporation is a California-based aerospace manufacturer that designs and produces large, high-power satellite buses intended to deliver significantly more power, mass and payload volume at lower cost than traditional large satellites. The company emphasizes production-line style builds and commercial supply chains to shorten lead times and reduce per-unit cost, enabling multi-manifest launches and multi-orbit missions across LEO, MEO, GEO and cislunar space. K2 serves commercial, scientific and government/defense customers, and focuses on enabling missions that require high throughput, high-power payloads.

📋 Description

• Own ASIC package architecture for FC-BGA and MCM solutions, including substrate stack-up, ball-map strategy, power delivery, signal breakout, and mechanical constraints. • Lead package-level trade studies across cost, performance, power integrity (PI), signal integrity (SI), thermal, manufacturability, and reliability. • Define long-term packaging roadmap aligned with future ASIC nodes, bandwidth scaling, and multi-die integration. • Establish organizational package design standards, methodologies, and best practices. • Drive detailed design of FC-BGA packages for high-pin-count ASICs with high-speed SerDes, dense power grids, and RF signal content. • Define and review substrate stack-ups, via strategies, impedance control, escape routing, and reference plane planning. • Partner with silicon, RF, and systems teams to co-optimize die floorplans and package interfaces. • Own package-level SI/PI strategy, including high-speed digital interfaces (e.g., SerDes, JESD, Interlaken), power delivery network (PDN) design, and decoupling strategy • Lead thermal architecture at the package level, including lid selection, TIMs, heat-spreaders, and mechanical interfaces to system cooling. • Serve as the primary technical interface to substrate vendors, assembly houses, and OSATs. • Drive material selection, substrate technology choices, and assembly process optimization.

🎯 Requirements

• Bachelor’s degree in Packaging Engineering, Mechanical Engineering, Electrical Engineering, or a related field. • 10+ years of experience in ASIC package design, with deep expertise in FC-BGA. • Proven experience delivering high-pin-count, high-performance ASIC packages into production. • Strong understanding of substrate technologies and materials, SI/PI fundamentals at the package level, and thermal management for power-dense ASICs. • Fluent in SI/PI and EM simulation tools such as SIWave, HFSS, and ADS. • Experience working directly with OSATs and substrate vendors. • Knowledge of packaging qualification and test methodologies.

🏖️ Benefits

• Comprehensive benefits package including paid time off • Medical/dental/vision coverage • Life insurance • Paid parental leave • Many other perks