Senior Engineer, Analog Mixed-Signal Design

🕒 July 15

🇩🇪 Germany – Remote

⏰ Full Time

🟠 Senior

🧑‍💻 Full-stack Engineer

👻 Ghost score 14%

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SiTime

WebsiteLinkedInAll Job Openings

201 - 500 employees

Founded 2005

🏭 Manufacturing

💼 Consulting

📦 Logistics

Manufacturing • Consulting • Logistics

SiTime is a leader in precision timing solutions, specializing in MEMS (Micro-Electro-Mechanical Systems) technology that provides superior timing devices used in various industries, including automotive, aerospace, and communications. Their innovative products enhance system performance, reduce size, and deliver unmatched reliability in harsh environments, making them indispensable in advanced applications such as 5G, IoT, and automotive electronics.

📋 Description

• Design analog and mixed-signal circuits meeting architectural requirements and technical specifications • Contribute to the architectural definition of the design and chip integration • Perform calculations, design and verification simulations to ensure building blocks meet specifications at the schematic level and after post-layout extraction, while fully provisioning for DFT and DFM • Work closely with Layout Engineers to validate proper layout, using all best-known methods • Document assigned blocks, and hold preliminary and final design review meetings • Actively participate in the chip bring up, evaluation and characterization, with emphasis on owned blocks • Work cross-functionally with Product, Characterization, Test, and Application Engineers on issues related to owned circuit blocks • Support other projects as needed by management or as business needs change

🎯 Requirements

• M.S. in Electrical Engineering or related field with minimum 4 years of related experience, or Ph.D. in Electrical Engineering with minimum 2 years of related experience • Excellent academic record with published research projects prototyped and proven in silicon • Detailed knowledge of CMOS circuits and noise analysis • Core expertise in one of the following areas: Integer-N and fractional-N PLL (Sigma-Delta and LC), Sigma-Delta ADCs (preferably > 14 ENOB), Temperature Sensors, Analog and digital filters, Quartz or MEMS Oscillator, Sub-threshold circuits, Low noise regulator and bandgap, High-speed output drivers • Knowledge of programming languages: Matlab, VerilogA, Oceanscript • Ability to oversee circuit layout for critical blocks • Ability to perform noise analysis • Proficient in using Cadence analog design tools

🏖️ Benefits

• Quarterly bonus tied to the achievement of innovation goals • Equity grants