Staff ASIC Digital Engineer – STA, Sign-Off

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Logo of Western Digital

Western Digital

10,000+ employees

Founded 1970

👥 B2C

🤝 B2B

🔧 Hardware

💰 $900M Post-IPO Equity on 2023-01

B2C • B2B • Hardware

Western Digital is a leading manufacturer of data storage solutions, including solid state drives (SSDs), hard drives (HDDs), USB flash drives, and memory cards. The company provides a broad range of products for various uses, such as gaming, video surveillance, and data backup. They also offer solutions for data centers, network-attached storage (NAS), and digital photography. Western Digital is renowned for their innovation in developing storage technologies that meet the needs of both consumers and businesses.

📋 Description

• Own complete STA signoff for ASIC, providing direction and guidance to PnR team for Timing closure & Synthesis report analysis. • Work with IP & Design team for Timing constraints Development & Review activities. • Develop and implement advanced STA methodologies and strategies to meet the timing closure requirements of complex IC designs. • Collaborate with cross-functional teams, including design, verification, physical design, and DFT, to ensure seamless integration and optimal timing performance. • Drive the development and maintenance of STA scripts and tools to automate and streamline timing analysis processes. • Conduct thorough timing analysis, identify critical paths, and develop strategies to mitigate timing violations and improve overall design performance. • Prepare and present detailed timing reports and technical documentation to stakeholders. • Foster a culture of innovation, collaboration, and continuous improvement within the STA team.

🎯 Requirements

• 9 to 12 years of experience • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field. • A minimum of 8 years of experience in Static Timing Analysis. • Proven track record of successfully executing STA & Own STA signoff. • Lead complete STA activity and guided engineers to achieve the STA closure. • In-depth knowledge of STA tools (e.g., Synopsys PrimeTime, Cadence Tempus , Constraints Manager) and methodologies. • Strong understanding of digital design principles, physical design, and semiconductor fabrication processes. • Excellent problem-solving skills and the ability to think strategically and analytically. • Exceptional communication and interpersonal skills, with the ability to effectively collaborate with cross-functional teams and stakeholders. • Ability to prioritize tasks and manage multiple project work simultaneously. • A proactive, results-oriented mindset with a passion for innovation and continuous improvement. • Experience with advanced process nodes (e.g. 5nm, 3nm) is highly desirable.

🏖️ Benefits

• Employees can work remotely

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