Senior Hardware Engineer – RTL, High-Level Synthesis

🔥 12 hours ago

🏄 California, Massachusetts – Remote

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⏰ Full Time

🟠 Senior

🔧 Hardware Engineer

👻 Ghost score 25%

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Logo of Code Metal

Code Metal

51 - 200 employees

Founded 2023

🚀 Aerospace

🚘 Automotive

🎖️ Defense

Aerospace • Automotive • Defense

Code Metal is a B2B software company that provides verifiable code translation and automated toolchains to convert high-level research/AI code into low-level, standards-compliant, production-ready software for mission-critical systems. It combines AI-guided translation, static analysis, automated test-generation (including MCDC), formal verification, and target-specific optimization to produce traceable, safety- and compliance-checked code (C/C++, Rust, VHDL, CUDA, OpenCL, etc. ) that can be deployed across chips and embedded platforms. The platform targets defense, aerospace, automotive, semiconductor and robotics customers who need guaranteed functional equivalence, safety compliance, and chip portability.

📋 Description

• Develop C++ and post-HLS readability and optimization passes to produce human-auditable RTL • Leverage Agentic AI and verification capabilities within Code Metal • Contribute to CI/CD qualification, including automated RTL simulation, functional verification, and regression testing • Architect and expand capabilities for creating production-ready RTL from high-level algorithm descriptions • Integrate HLS and support RTL code generation • Collaborate across hardware, software, and verification disciplines

🎯 Requirements

• 3+ years of hands-on experience with writing RTL code or using High-Level Synthesis • Experience with at least one commercial HLS tool (Catapult, Vitis HLS, Stratus, or equivalent) • Solid hardware modeling background regarding fixed-point arithmetic, bit-accurate types, synthesis pragmas and modeling trade-offs • Scripting experience in Python for development, toolchain automation and testing • Strong debugging and problem-solving skills • Experience with simulation and functional verification flows • Experience using Linux-based development environments • Solid understanding of RTL / VHDL • Understanding of FPGA architectural capabilities and constraints • Knowledge of verification methodologies and testbench development • Experience with DSP algorithms and applications using Python/MATLAB • Interest in or familiarity with LLM-assisted code transformation and readability tooling • Experience with Git-based development workflows and CI/CD environments • U.S. citizenship may be required for certain project assignments involving security clearance • Legal authorization to work in the United States and ability to obtain and maintain a U.S. security clearance may be required for certain assignments

🏖️ Benefits

• Health care plan with 100% premium coverage, including medical, dental, and vision • 401k with 5% matching • Paid Time Off (uncapped vacation, plus sick and public holidays) • Flexible hybrid or remote work arrangement • Relocation assistance for qualifying employees • Pay strives to be at the upper end of the salary range

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