Testsite Engineer, Quantum

🔥 26 minutes ago

🌐 United States, Malta – Remote

🇺🇸 United States – Remote 🇲🇹 Malta – Remote

🗽 New York – Remote

🗽 New York – Remote

💵 $118k - $210k / year

⏰ Full Time

🟡 Mid-level

🟠 Senior

👷🏻‍♀️ Engineer

🦅 H1B Visa Sponsor

This company has sponsored H1B visas in the past.

👻 Ghost score 1%

What it means: how likely this posting is sitting open without active hiring.How to read it: 60% or higher means we think this is a ghost. Lower scores are less of a worry.How we score it: age, reposts, open roles vs team size, how fast jobs close, and whether pay is listed.Fine print: an estimate from public data, not a judgment of the company. Real jobs can score high, so treat it as a hint, not a fact.

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GlobalFoundries

WebsiteLinkedInAll Job Openings

10,000+ employees

🏭 Manufacturing

🔧 Hardware

Manufacturing • Hardware

GlobalFoundries is one of the world’s leading semiconductor manufacturers. GF is redefining innovation and semiconductor manufacturing by developing and delivering feature-rich process technology solutions that provide leadership performance in pervasive high growth markets. GF offers a unique mix of design, development, and fabrication services. With a talented and diverse workforce and an at-scale manufacturing footprint spanning the U. S. , Europe and Asia, GF is a trusted technology source to its worldwide customers.

📋 Description

• Design and develop in-house test chips, testsites, and test structures to characterize semiconductor technologies and improve understanding of customer design and technology requirements • Define and implement chip-level and device-level structures enabling electrical measurement, technology characterization, and development learning • Collaborate with technology development, design enablement, product, test, and manufacturing teams to translate characterization needs into testsite requirements and silicon implementations • Evaluate and process internal and customer designs through design-to-mask readiness, including layout review and applicable design-rule, verification, and release activities • Plan and execute electrical characterization and other relevant testing of fabricated test chips • Analyze silicon data, identify trends and performance gaps, and translate results into recommendations for technology, model, design-rule, or testsite optimization • Iterate testsite and chip designs based on measured silicon results • Document testsite architecture, design intent, measurement results, and technical conclusions, and communicate findings to cross-functional stakeholders • Perform activities safely and support Environmental, Health, Safety & Security requirements and programs • Work collaboratively on other projects and assignments as needed

🎯 Requirements

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Applied Physics, Microelectronics, or a related technical field • Relevant experience in semiconductor IC or test-chip design, technology development, device characterization, product engineering, or a related field; minimum years of experience aligned with the applicable GF career level and scoping guidelines • Working knowledge of semiconductor devices, integrated-circuit design or layout, electrical characterization, and interpretation of silicon measurement data • Experience with semiconductor design and verification flows such as schematic capture, layout, DRC/LVS, extraction, simulation, or design-to-mask release processes • Ability to analyze technical data, identify root causes and trends, and translate results into design or technology improvements • Fluency in English, written and verbal • Preferred: Master’s degree or PhD in Electrical Engineering, Computer Engineering, Applied Physics, Microelectronics, or a related field • Preferred experience designing semiconductor test chips, process-control or characterization structures, or dedicated technology-development testsites • Preferred experience with industry-standard EDA environments and data-analysis tools used for IC design, verification, characterization, and silicon debug • Preferred understanding of CMOS process technology, device physics, parasitic effects, process variation, reliability, and design-technology interaction • Preferred experience working across design, process integration, characterization, modeling, PDK, test, or manufacturing organizations • Preferred project management, communication, planning, and organizational skills