Principal ASIC Package Design Engineer

🔥 12 hours ago

🇺🇸 United States – Remote

⏰ Full Time

🔴 Lead

🧑‍🔧 Mechanical Engineer

👻 Ghost score 25%

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K2 Space Corporation

WebsiteLinkedInAll Job Openings

11 - 50 employees

Founded 2022

🎖️ Defense

📦 Logistics

🏭 Manufacturing

Defense • Logistics • Manufacturing

K2 Space Corporation is a California-based aerospace manufacturer that designs and produces large, high-power satellite buses intended to deliver significantly more power, mass and payload volume at lower cost than traditional large satellites. The company emphasizes production-line style builds and commercial supply chains to shorten lead times and reduce per-unit cost, enabling multi-manifest launches and multi-orbit missions across LEO, MEO, GEO and cislunar space. K2 serves commercial, scientific and government/defense customers, and focuses on enabling missions that require high throughput, high-power payloads.

📋 Description

• Own ASIC package architecture for FC-BGA and MCM solutions, including substrate stack-up, ball-map strategy, power delivery, signal breakout, and mechanical constraints • Lead package-level trade studies across cost, performance, power integrity, signal integrity, thermal, manufacturability, and reliability • Define long-term packaging roadmap aligned with future ASIC nodes, bandwidth scaling, and multi-die integration • Establish organizational package design standards, methodologies, and best practices • Drive detailed design of FC-BGA packages for high-pin-count ASICs with high-speed SerDes, dense power grids, and RF signal content • Define and review substrate stack-ups, via strategies, impedance control, escape routing, and reference plane planning • Partner with silicon, RF, and systems teams to co-optimize die floorplans and package interfaces • Own package-level SI/PI strategy, including high-speed digital interfaces, PDN design, and decoupling strategy • Lead thermal architecture at the package level, including lid selection, TIMs, heat-spreaders, and mechanical interfaces to system cooling • Manage relationships with external packaging vendors, substrate suppliers, and OSATs, including vendor qualification, capability assessment, contract negotiation, and performance/quality score carding • Drive material selection, substrate technology choices, and assembly process optimization

🎯 Requirements

• Bachelor’s degree in Packaging Engineering, Mechanical Engineering, Electrical Engineering, or a related field • 10+ years of experience in ASIC package design, with deep expertise in FC-BGA • Proven experience delivering high-pin-count, high-performance ASIC packages into production • Strong understanding of substrate technologies and materials, SI/PI fundamentals at the package level, and thermal management for power-dense ASICs • Fluent in SI/PI and EM simulation tools such as SIWave, HFSS, and ADS • Experience working directly with OSATs and substrate vendors • Knowledge of packaging qualification and test methodologies • The person hired must either be a “U.S. person” as defined by 22 C.F.R. § 120.15 or otherwise eligible for a federally issued export control license