Principal ASIC Synthesis, Timing Engineer

Job not on LinkedIn

🔥 1 minute ago

🇺🇸 United States – Remote

💵 $190k - $280k / year

⏰ Full Time

🔴 Lead

👷🏻‍♀️ Engineer

👻 Ghost score 21%

What it means: the chance that no one is really hiring for this job.How to read it: 60% or higher means we think this is a ghost. Lower scores are less of a worry.Why this score:

• Just posted.
• Jobs at this company usually fill in 55 days.
• 17 open roles for a team of 34.

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K2 Space Corporation

WebsiteLinkedInAll Job Openings

11 - 50 employees

Founded 2022

🎖️ Defense

📦 Logistics

🏭 Manufacturing

Defense • Logistics • Manufacturing

K2 Space Corporation is a California-based aerospace manufacturer that designs and produces large, high-power satellite buses intended to deliver significantly more power, mass and payload volume at lower cost than traditional large satellites. The company emphasizes production-line style builds and commercial supply chains to shorten lead times and reduce per-unit cost, enabling multi-manifest launches and multi-orbit missions across LEO, MEO, GEO and cislunar space. K2 serves commercial, scientific and government/defense customers, and focuses on enabling missions that require high throughput, high-power payloads.

📋 Description

• Lead implementation of complex SoCs for next-generation satellite and space systems • Own constraints development and validation from RTL handoff through synthesis • Own the complete RTL-to-synthesis flow at block and top level • Work with physical design teams to integrate floorplanning information for physical synthesis • Develop and maintain methodologies, scripts, and automation to optimize performance, power, and area • Collaborate with architecture, RTL design, DFT, physical design, front-end, and verification teams • Drive timing closure across multiple voltage and process corners, including foundry-qualified sign-off • Own Lint, CDC, and UPF checks and close issues • Develop an end-to-end formal verification methodology • Manage and technically guide external physical design partners and service vendors • Work with EDA vendors to debug and optimize tool flows and evaluate methodologies • Support chip bring-up and debug with post-silicon and test teams • Support the product through production and spaceflight • Develop and implement SoC subsystems for satellite communications and beyond • Drive schedule convergence, first-pass silicon success, timing closure, PPA optimization, and design integration

🎯 Requirements

• B.S. or M.S. in Electrical Engineering, Computer Engineering, or related field • 10+ years of experience in ASIC design for high-performance SoCs • Proven end-to-end expertise in RTL-to-GDSII flows using Synopsys, Cadence, or Siemens tools • Strong hands-on experience with timing closure, IR drop analysis, low power implementation, and ECO implementation • Deep understanding of physical design constraints for multi-clock, multi-voltage, and hierarchical SoCs • Experience with advanced FinFET process nodes • Prior experience in design convergence with offshore/outsourced physical design teams or vendors • Ability to resolve formal verification issues • Ability to analyze and fix VCLP issues regarding UPF • Experience with logic equivalence check debug, functional ECO development and implementation, and low power checker validation of UPF • Familiarity with DFT integration and STA sign-off with functional ECO implementation • Excellent communication, leadership, and cross-functional collaboration skills • Ability to act as technical leader and subject-matter expert, teaching, growing, and mentoring others • The hired person must be a U.S. person as defined by ITAR or otherwise eligible for a federally issued export control license • Nice-to-have: exposure to radiation-hardened or space-qualified ASICs; physical design service vendor management or offshore collaboration; TSMC tapeouts; Gate-All-Around technologies; cross-functional geographically distributed teams

🏖️ Benefits

• Equity in the company • Paid time off • Medical, dental, and vision coverage • Life insurance • Paid parental leave • Many other perks • Reasonable accommodation for applications and interviews

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