Senior ASIC Package Design Engineer

🕒 September 15

🇺🇸 United States – Remote

⏰ Full Time

🟠 Senior

🧑‍🔧 Mechanical Engineer

👻 Ghost score 31%

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K2 Space Corporation

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📦 Logistics

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📋 Description

• Implement advanced ASIC package architecture with a strong focus on flip-chip BGA (FC-BGA) and multi-chip module (MCM) solutions • Support end-to-end package strategy for high-performance mixed-signal and digital SoCs from early architecture and trade studies through vendor engagement, qualification, and production ramp • Define ASIC package architecture for FC-BGA and MCM solutions, including substrate stack-up, ball-map strategy, power delivery, signal breakout, and mechanical constraints • Lead package-level trade studies across cost, performance, power integrity, signal integrity, thermal, manufacturability, and reliability • Establish package design standards, methodologies, and best practices • Drive detailed design of FC-BGA packages for high-pin-count ASICs with high-speed SerDes, dense power grids, and RF signal content • Define and review substrate stack-ups, via strategies, impedance control, escape routing, and reference plane planning • Partner with silicon, RF, and systems teams to co-optimize die floorplans and package interfaces • Support package-level SI/PI strategy, including high-speed digital interfaces, power delivery network design, and decoupling strategy • Lead package-level thermal architecture, including lid selection, TIMs, heat-spreaders, and mechanical interfaces to system cooling • Manage relationships with external packaging vendors, substrate suppliers, and OSATs • Drive material selection, substrate technology choices, and assembly process optimization

🎯 Requirements

• Bachelor’s degree in Packaging Engineering, Mechanical Engineering, Electrical Engineering, or a related field • 5+ years of experience in ASIC package design, with deep expertise in FC-BGA • Proven experience delivering high-pin-count, high-performance ASIC packages into production • Strong understanding of substrate technologies and materials, SI/PI fundamentals at the package level, and thermal management for power-dense ASICs • Fluent in SI/PI and EM simulation tools such as SIWave, HFSS, and ADS • Experience working directly with OSATs and substrate vendors • Knowledge of packaging qualification and test methodologies • The person hired must either be a “U.S. person” as defined by ITAR or otherwise eligible for a federally issued export control license • Nice to Have: Experience with MCM or heterogeneous integration (chiplets, interposers, advanced laminates) • Nice to Have: Background in high-speed digital or mixed-signal SoCs • Nice to Have: Familiarity with aerospace, space, or high-reliability electronics

🏖️ Benefits

• Reasonable accommodation available as part of the employment application or interview process • Equal Opportunity Employer

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