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Senior Director, Engineering

🔥 15 hours ago

🇨🇦 Canada – Remote

⏰ Full Time

🟠 Senior

🖥 Software Engineer

Where this job comes from

Posted on Silvaco Inc's careers page, not through a job board

First seen by Remote Rocketship 15 hours ago

Still open on Silvaco Inc's site. Checked 1 hour ago.

Logo of Silvaco Inc

Silvaco Inc

201 - 500 employees

🚘 Automotive

💼 Consulting

🏭 Manufacturing

💰 $5M Convertible Note - Silvaco on 2024-04

Automotive • Consulting • Manufacturing

Silvaco Inc is a provider of semiconductor design and simulation software and silicon IP, offering TCAD and SPICE device modeling, process-to-signoff simulation flows, analog/mixed-signal circuit design and layout tools, and a portfolio of physical and interface IP (standard cell libraries, memory compilers, MIPI PHYs, embedded processors, and automotive/IoT IP). The company supports foundry and fabless customers with process design kits, library characterization, library design, and fab technology co-optimization (FTCO) services, and also supplies solutions for power devices, photonics/optoelectronics, and low-power foundation IP.

📋 Description

• Lead architecture, circuit design, and physical implementation of memory compilers across SRAM, ROM, register files, and dual-port RAM • Define bitcell selection, peripheral architecture, redundancy and repair strategy, and assist circuits to achieve PPA targets • Drive Vmin, leakage, performance, area, and yield optimization across PVT corners, process variation, and aging effects • Own the technical roadmap for the memory portfolio, including compiler variants, new process nodes, features, and methodology improvements • Establish design, verification, and signoff methodology • Lead design and layout reviews, SPICE/FastSPICE characterization, statistical/Monte Carlo analysis, BIST/repair, DFT, and physical verification • Lead silicon validation, including test chip development, testing, and reporting • Lead, mentor, and grow a team of memory design engineers across circuit design, layout, characterization, and compiler automation • Set team goals, conduct technical reviews, develop career paths, and allocate engineering effort across projects and customer commitments • Lead presales engagements, present Silvaco's memory portfolio, and shape technical proposals • Translate customer SoC requirements into compiler specifications and PPA commitments • Partner with sales, field application engineers, and product management on RFQs, technical evaluations, and benchmarking • Lead technical workshops, respond to technical questionnaires, and support audit-style reviews • Own PPA analysis and competitive benchmarking against foundry and third-party memory IP • Drive architecture trade-off analysis and translate insights into datasheets, application notes, and technical white papers • Serve as primary technical contact for strategic customers from evaluation through integration, tapeout, and silicon validation • Lead integration debugging, silicon correlation discussions, and root-cause analysis of customer issues • Coordinate across design, characterization, CAD, and product teams • Represent Silvaco in foundry partner meetings and industry conferences as needed

🎯 Requirements

• BS, MS, or PhD in Electrical Engineering, Computer Engineering, or a related field • 10+ years of embedded memory design experience, with production tapeouts of SRAM and at least two of: ROM, 1-port register file, 2-port register file, dual-port RAM • Deep expertise in bitcell-level circuit design, memory peripherals, self-timed paths, sense amplifier design, and assist circuit techniques • Hands-on experience across multiple process nodes, including FinFET and/or advanced sub-7nm nodes • Strong command of SPICE simulation, statistical and Monte Carlo analysis, Vmin/yield modeling, and reliability analysis (BTI/HCI/EM) • Working knowledge of memory compiler architecture and automation, including generation of .lib, LEF, GDS, Verilog, and CDL views • Hands-on experience with DFT/scan tools such as Tessent and FastScan • Experience with power integrity signoff using RedHawk or equivalent • Experience with layout verification flows including DRC, LVS, and parasitic extraction • Familiarity with RTL/Verilog modelling of memory compilers, testchip definition and silicon correlation, and SDK/automation development for compiler view generation • Proven team leadership experience over a team of 6+ memory designers • Demonstrated success in customer-facing technical roles, including presales, PPA negotiation, and integration support • Excellent written and verbal communication skills • Proficiency with Python, TCL, Perl, and Linux-based design environments • Experience working with AI tools such as Claude, OpenAI, and Gemini • Prior experience presenting at industry venues or contributing to memory IP standards • Direct experience interfacing with foundry partners on PDK, bitcell qualification, and reference flow alignment • Preferred: experience leading memory compiler programs at an IP vendor, foundry, or large semiconductor company • Preferred: low-power memory design background for mobile, IoT, automotive, or AI/ML accelerator applications • Preferred: experience with multi-port memory architectures beyond 2-port and specialty memories

🏖️ Benefits

• Equity, bonuses, commission, or other forms of compensation may be provided depending on the position • Medical, financial, and other benefits

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