ASIC DFT Engineer, DFT/ATPG/MBIST/SCAN/JTAG

🕒 April 6

🏢🏡 Bangalore – Hybrid

⏰ Full Time

🟠 Senior

🔴 Lead

👷🏻‍♀️ Engineer

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Logo of Cisco

Cisco

WebsiteLinkedIn

10,000+ employees

Founded 1984

🔧 Hardware

🔐 Security

🏢 Enterprise

Hardware • Security • Enterprise

Cisco is a multinational technology company that provides networking hardware, software, and services to enterprises, service providers, and governments. It builds routers, switches, optical transceivers, programmable silicon, and edge computing platforms, and offers security, collaboration (Webex), observability, and AI-enabled software and support services to help organizations design, operate, and secure large-scale networks and data centers. Cisco also delivers professional services, training, and cloud-managed solutions to support digital transformation and AI-ready infrastructure.

📋 Description

• Implementing Hardware Design-for-Test (DFT) features supporting ATE, in-system test, debug and diagnostics • Development of innovative DFT IP in collaboration with multi-functional teams • Key role in full chip design integration with testability features • Work closely with design/design-verification and PD teams for test logic integration • Enable validation of Test logic in all phases of implementation and post-silicon validation flows

🎯 Requirements

• Bachelor's or Master’s Degree in Electrical or Computer Engineering • 8-10 years of related work experience • Knowledge of DFT, test, and silicon engineering trends • Experience with Jtag protocols, Scan insertion, ATPG • Experience with ATPG and EDA tools like TestMax, Tetramax, Tessent • Experience working with Gate level simulation, debugging with VCS and other simulators • Post-silicon validation and debug experience • Ability to work with ATE patterns, P1687 • Scripting skills: Tcl, Python/Perl

🏖️ Benefits

• Flexible work arrangements • Professional development opportunities

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