Coherency Verification Engineer

Job not on LinkedIn

🕒 June 15

🌐 Spain, France, +5 more countries – Remote

🇪🇸 Spain – Remote 🇫🇷 France – Remote 🇩🇪 Germany – Remote 🇺🇸 United States – Remote 🇮🇳 India – Remote 🇮🇹 Italy – Remote 🇨🇭 Switzerland – Remote

⏰ Full Time

🟠 Senior

🔴 Lead

👷🏻‍♀️ Engineer

👻 Ghost score 34%

What it means: how likely this posting is sitting open without active hiring.How to read it: 60% or higher means we think this is a ghost. Lower scores are less of a worry.How we score it: age, reposts, open roles vs team size, how fast jobs close, and whether pay is listed.Fine print: an estimate from public data, not a judgment of the company. Real jobs can score high, so treat it as a hint, not a fact.

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TechBiz Global

WebsiteLinkedInAll Job Openings

51 - 200 employees

📣 Marketing

📦 Logistics

🎯 Recruiter

Marketing • Logistics • Recruitment

TechBiz Global is a leading recruitment and software development company that specializes in connecting businesses with top-tier talent across 28+ countries. They serve clients from startups to major enterprises, providing expertise in hiring key roles in industries such as FinTech. In addition to talent acquisition, TechBiz Global offers comprehensive software development services to turn clients' visions into reality, powering digital transformations with expert engineers. The company also provides strategic CTO consulting services and flexible outstaffing and outsourcing solutions, helping businesses manage growth and optimize technology processes. Recognized as a top IT recruitment and consulting firm, TechBiz Global is dedicated to delivering personalized and innovative solutions to its clients, ensuring they have the tools necessary for success.

📋 Description

• Verify complex digital designs at RTL level according to architecture and design specifications. • Develop and maintain verification environments using SystemVerilog and UVM. • Create, execute, and debug test plans for block-level, subsystem-level, and top-level verification. • Work on the verification of coherent systems, including cache-related functionality and interconnect behavior. • Validate designs involving CHI protocol, cache structures, coherency mechanisms, and system-level interactions. • Run and manage simulations, regressions, and debug failures using industry-standard verification tools. • Apply both formal and dynamic verification methodologies to identify design issues early. • Use scripting languages such as Python, Perl, Bash, or TCL to automate verification flows and regression processes. • Collaborate closely with architecture, design, and verification teams to analyze specifications, clarify requirements, and resolve issues. • Track, document, and communicate verification progress, bugs, coverage status, and technical risks. • Contribute to continuous improvement of verification methodology, tools, and best practices.

🎯 Requirements

• Master or PhD • English C1 • Industrial experience +8 years • Proficiency in SystemVerilog and UVM • Knowledge of scripting languages (Python, Perl, Bash, TCL) and regression tools • Experience with simulation and simulation tools • Knowledge of revision control methodology and tools (git, svn) • Experience in block level and sub-system or top level verification • Experience with formal and dynamic verification • Strong problem-solving skills and attention to detail • Excellent communication and teamwork abilities • Knowledge of the CHI protocol • Understanding of caches' structure and parameters • Experience in verification of coherent systems

🏖️ Benefits

• Professional development opportunities