ASIC Verification Engineering Manager

Job not on LinkedIn

October 11

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Logo of Cornelis Networks

Cornelis Networks

Artificial Intelligence • Hardware • Enterprise

Cornelis Networks is a leading provider of intelligent, scalable, high-performance interconnects designed for AI applications. The company specializes in delivering end-to-end purpose-built high-performance fabrics to commercial, scientific, academic, and government organizations. Cornelis Networks’ solutions are aimed at enhancing performance, scalability, and efficiency across hyperscale, cloud AI, and on-premises AI/HPC environments. Their offerings are known for scalable architecture, high bandwidth solutions, and universal compatibility with accelerators and GPUs. Originating as an Intel spin-off, the company is positioned to challenge existing technologies like InfiniBand and Ethernet, providing advanced interconnects that power modern AI infrastructure.

51 - 200 employees

🤖 Artificial Intelligence

🔧 Hardware

🏢 Enterprise

💰 $29M Series B on 2022-11

📋 Description

• Leading an ASIC Design Verification Team and deliver block level and full chip verification and emulation activities with high quality • Overseeing verification test planning, execution, and the development of innovative verification methodologies • Driving functional and code coverage closure • Collaborating closely with RTL, architecture, software/firmware, emulation, and post-silicon validation teams • Contributing to the development and execution of a DV strategy that aligns with the company’s objectives for first pass silicon success • Hiring, training, and supporting a team of ASIC engineers to ensure timely and cost-effective product development • Supporting the organizational goals through people management aspects

🎯 Requirements

• 15 + years’ experience in ASIC/SoC design verification • 5 + years’ experience leading a team of direct reports • Expertise in design verification tools such as Synopsys VCS and Verdi • Proven success in first-pass ASIC development • Experience managing multiple projects and adjusting priorities with stakeholders • Proficiency in developing UVM constrained random test benches • Strong understanding of interpreting functional specifications and creating comprehensive test plans • B.S. or M.S. in Computer Engineering, Electrical Engineering, or related technical field, or equivalent practical experience • Experience in building UVM environments from scratch (preferred) • Previous experience in a startup environment, demonstrating adaptability and a hands-on approach (preferred) • Expertise in working with networking System on Chips (SOCs) (preferred) • Strong leadership in a dynamic, fast-paced development environment (preferred)

🏖️ Benefits

• Health and retirement benefits • Equity, cash, and incentives • Medical, dental, and vision coverage • Disability and life insurance • Dependent care flexible spending account • Accidental injury insurance • Pet insurance • Generous paid holidays • 401(k) with company match • Open Time Off (OTO) for regular full-time exempt employees • Sick time • Bonding leave • Pregnancy disability leave

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