Senior Power Integrity Engineer

🔥 14 hours ago

🇹🇼 Taiwan – Remote

⏰ Full Time

🟠 Senior

👷🏻‍♀️ Engineer

👻 Ghost score 12%

infoinfo
Apply Now
Find Similar Remote Jobs

📊 Check your resume score for this job

Improve your chances of getting an interview by checking your resume score before you apply.

Logo of DriveNets

DriveNets

201 - 500 employees

📡 Telecommunications

Telecommunications

DriveNets is a rapidly growing software company that has created a radical new way for service providers and hyperscalers to build their networking infrastructure. DriveNets Network Cloud and DriveNets Network Cloud-AI are innovative networking solutions that apply the cloud architectural approach to high-scale networking, combining the scalability of standard Ethernet Clos architecture with the high performance and reliability of service provider networking. Founded by successful telco entrepreneurs Ido Susan and Hillel Kobrinsky, DriveNets offers the leading open disaggregated networking solution utilizing cloud-native software on standard white boxes. Their solutions are globally adopted by numerous service providers and are in various trials, significantly impacting network operations, including a substantial deployment with AT&T.

📋 Description

• Lead Power Integrity activities throughout the hardware development lifecycle, from architecture through production • Define and optimize board-level and package-level Power Delivery Networks for high-current networking ASICs and supporting devices • Perform pre-layout and post-layout PI simulations using industry-standard tools • Establish target impedance requirements and validate compliance across all power rails • Analyze DC voltage drop, AC impedance, transient response, and power distribution performance • Collaborate with PCB layout engineers to optimize stackups, plane structures, decoupling strategies, and power routing • Work with Signal Integrity engineers to ensure SI/PI co-optimization of high-speed interfaces • Develop power integrity design guidelines and best practices for next-generation networking products • Support schematic reviews, layout reviews, and design sign-off activities • Perform laboratory measurements and correlation using oscilloscopes, VNAs, power analyzers, current probes, and related equipment • Investigate and resolve PI-related issues during board bring-up, validation, and production • Collaborate with ASIC, FPGA, memory, optics, and power component vendors to optimize overall system performance • Drive continuous improvement of PI methodologies, simulation flows, and validation processes • Achieve PI sign-off requirements for all networking platforms • Minimize power-related issues during bring-up and production • Improve first-pass hardware success rate • Enable reliable operation of next-generation high-bandwidth networking systems • Establish scalable PI methodologies for future hardware platforms

🎯 Requirements

• B.Sc. or M.Sc. in Electrical Engineering • 5+ years of experience in Power Integrity, Hardware Design, or related disciplines • Strong understanding of power delivery networks, decoupling methodologies, and target impedance concepts • Hands-on experience with PI simulation tools such as Cadence Sigrity PowerSI / OptimizePI, Ansys SIwave, Ansys HFSS, and PowerDC or equivalent • Experience designing high-layer-count PCBs for networking, telecom, server, or data-center products • Knowledge of high-speed digital systems and interaction between Signal Integrity and Power Integrity • Experience with multi-phase voltage regulators, power sequencing, and power management architectures • Strong understanding of PCB materials, stackups, and manufacturing constraints • Experience performing lab validation and correlation measurements • Excellent problem-solving, communication, and teamwork skills • Experience with high-performance networking ASICs and switch silicon • Familiarity with 112G/224G/448G PAM4 SerDes technologies • Experience with Ethernet systems ranging from 400G to 1.6T and above • Understanding of package-level PI and advanced packaging technologies • Familiarity with optical networking platforms and co-packaged optics • Experience with thermal and mechanical effects on PDN performance • Knowledge of EMI/EMC considerations in high-density networking systems • Experience working with ODMs, CMs, and global manufacturing partners

🏖️ Benefits

• Work on industry-leading networking systems deployed by top-tier service providers and cloud operators • Influence next-generation networking hardware architecture • Collaborate with world-class hardware, ASIC, and software engineers • Be part of a fast-growing company transforming the networking industry

Apply Now

Similar Jobs

🕒 2 days ago

Hewlett Packard Enterprise

10,000+ employees

🏢 Enterprise

🔧 Hardware

🤖 Artificial Intelligence

Resident Engineer managing and troubleshooting Juniper routing infrastructure for HPE’s global edge-to-cloud technology business. Supporting network transformations, incident response, upgrades, and operational stability.

🇹🇼 Taiwan – Remote

💰 $1.5G Post-IPO Equity - Hewlett Packard Enterprise on 2025-04

⏰ Full Time

🟡 Mid-level

🟠 Senior

👷🏻‍♀️ Engineer

Switching

TCP/IP

🕒 6 days ago

WEKA

201 - 500

🤖 Artificial Intelligence

🏢 Enterprise

🤝 B2B

Designated Services Engineer troubleshooting WEKA’s AI-native enterprise data infrastructure for top-tier customers. Bridging customer needs with Engineering while managing support cases and system reliability.

🗣️🇨🇳 Chinese Required

Cloud

Grafana

Linux

NFS

Prometheus

Python

Unix

🕒 September 1

Neat

201 - 500

🔧 Hardware

⚡ Productivity

📡 Telecommunications

Senior Camera Module Engineer owning camera design from sensor selection through mass production for Neat’s AI-native video devices. Partnering with Taipei and Oslo teams and Taiwan-China suppliers.

🕒 June 3

Intel Corporation

10,000+ employees

🏭 Manufacturing

💼 Consulting

📦 Logistics

Senior OSAT Engineer driving assembly and test engineering across global suppliers at Altera. Leading new product introduction and optimizing semiconductor manufacturing processes.

Assembly

🕒 April 24

NVIDIA

10,000+ employees

🏥 Healthcare

🏭 Manufacturing

🤖 Artificial Intelligence

Senior Package Engineer developing groundbreaking microelectronics packaging solutions at Nvidia. Collaborating with vendors, leading investigations, and supporting high volume production issues.