Senior ASIC Design Verification Engineer

🕒 February 10

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NVIDIA

WebsiteLinkedInAll Job Openings

10,000+ employees

Founded 1993

🤖 Artificial Intelligence

🎮 Gaming

Artificial Intelligence • Gaming • Automotive

NVIDIA is a leading technology company specializing in accelerated computing and artificial intelligence. NVIDIA pioneers advancements in graphical processing units (GPUs), cloud computing, data centers, and virtual reality, with a focus on gaming, automotive, healthcare, and robotics industries. The company's innovations, such as NVIDIA Omniverse, transform traditional digital processes by enabling high-fidelity simulations and rendering tasks. Their applications span various industries, from autonomous vehicles using NVIDIA DRIVE to healthcare solutions with NVIDIA Clara, and AI-driven analytics and workflows.

📋 Description

• verify the design and implementation of inference accelerator • responsible for verification of the ASIC design, architecture, reference models and micro-architecture using advanced verification methodologies • Understand the design and implementation of your unit, define the verification scope, develop the verification infrastructure and verify the correctness of the design • Collaborate with architects, designers, and pre and post silicon verification teams to accomplish your tasks • Implement and optimize automated verification flows to improve productivity and efficiency • Stay updated on the latest trends and advancements in ASIC design verification and incorporate innovative techniques into the verification process

🎯 Requirements

• Bachelors Degree in EE, CS or CE (or equivalent experience) and 8+ years of relevant industry experience • Background with building block and SoC level testbench utilizing strong debugging and analytical skills • Experience in verification using random stimulus along with functional coverage, assertion-based verification methodologies and tools • Expertise in SystemVerilog and Universal Verification Methodology (UVM) • Experience with design and verification tools (VCS, Verdi or equivalent) • Experience in UPF power verification is a plus • Experience in netlist and DFT verification is a plus • Perl/Python and C/C++ programming language experience desirable • Knowledge of ASIC design flow, from specification to GDS • Knowledge of applying machine learning to ASIC verification flow

🏖️ Benefits

• equity • generous benefits package