Design Verification Lead

🔥 0 minutes ago

Apply Now
Find Similar Remote Jobs

📊 Check your resume score for this job

Improve your chances of getting an interview by checking your resume score before you apply.

Logo of TYLsemi

TYLsemi

11 - 50 employees

Founded 2026

🔧 Hardware

🤖 Artificial Intelligence

🤝 B2B

Hardware • Artificial Intelligence • B2B

TYLsemi is a chiplet-first silicon company focused on AI infrastructure solutions. It provides production-ready, validated chiplets and a unified platform to take designs from architecture to deployed silicon, enabling faster, lower-risk development of AI systems. TYLsemi's offerings (branded TYL. IO, TYL. Power, TYL. Forge) target critical AI infrastructure functions—XPUs, switches, connectivity, power, and system scaling—and it also offers chiplet-enabled custom silicon, packaging, and manufacturing integration. The company promotes up to ~50% faster development and reduced costs, and recently raised $43M in an oversubscribed early-stage funding round.

📋 Description

• Define and drive the overall verification architecture for large-scale SoCs from IP through subsystem to full SoC level • Architect and develop reusable, modular, and portable verification platforms across multiple chip programs • Establish methodologies for verification reuse and portability, including Portable Stimulus (PSS)-based flows • Lead development of high-performance, coverage-driven testbenches using industry-standard methodologies such as UVM • Drive block-level, multi-block/subsystem-level, and full-chip SoC verification strategies • Define and enforce verification quality metrics, coverage closure strategies, and sign-off criteria • Champion a fail-fast philosophy to detect issues early and improve design quality • Drive initiatives toward first-pass silicon success and minimize escapes and post-silicon debug • Leverage AI/ML techniques and AI agents to automate testbench and stimulus generation, improve coverage closure, enhance regression and debug productivity, and enable intelligent verification QA and anomaly detection • Collaborate with design, architecture, physical design, and software teams • Mentor and guide design verification teams on best practices, methodology adoption, and architectural decisions

🎯 Requirements

• Bachelor’s/Master’s degree in Electrical Engineering, Computer Engineering, or related field • 10+ years of experience in Design Verification, with significant exposure to large SoC verification • Proven experience defining and deploying verification architectures for complex chips • Strong expertise in SystemVerilog and UVM • Strong expertise in coverage-driven verification, including functional and code coverage • Strong expertise in assertion-based verification (SVA) • Hands-on experience with Portable Stimulus (PSS) and cross-level stimulus reuse • Experience with industry-standard protocols such as PCIe, DDR, Ethernet, CXL, and UCIe • Deep understanding of SoC architectures in AI, HPC, or Networking domains • Experience with multi-IP integration challenges, coherency, high-speed interfaces, and large-scale data movement • Strong debugging skills and ability to handle complex system-level issues • Experience with AI/ML applications in verification workflows • Exposure to emulation, prototyping, or hybrid verification platforms • Familiarity with performance verification and power-aware verification • Experience building verification frameworks reused across multiple tape-outs • Strong architectural thinking with a systems-level mindset • High ownership and quality-first approach • Bias toward automation, reuse, and scalability • Passion for adopting cutting-edge technologies, especially AI-driven verification • Ability to operate in a fast-paced environment with a fail-fast, learn-fast attitude • Excellent collaboration and leadership skills

🏖️ Benefits

• Remote-friendly work environment • Opportunity to work with a global team • Opportunity to work on consequential AI/HPC semiconductor infrastructure • Work with paying customers, committed capital, and aggressive timelines • Opportunity to build and ship real silicon products • Opportunity to work with experienced semiconductor company founders and teams

Apply Now

Similar Jobs

🔥 8 hours ago

Parexel

10,000+ employees

💼 Consulting

🏥 Healthcare

📦 Logistics

Senior consultant designing RTSM and DHT systems for Parexel, a global clinical research organization. Advising study teams on requirements, integrations, testing, and clinical trial optimization.

🕒 August 7

Weekday (YC W21)

11 - 50

💼 Consulting

👥 HR Tech

☁️ SaaS

Physical Design Engineer implementing ASIC/SoC designs from RTL to GDSII for a semiconductor client in India. Driving timing closure, PPA optimization, verification, and tape-out on advanced nodes.

🕒 July 29

Syndigo

1001 - 5000

💼 Consulting

📦 Logistics

📣 Marketing

Senior Graphic Designer creating high-quality, on-brand designs for marketing, product, and sales initiatives. Collaborating with cross-functional teams and external vendors to deliver impactful creative.

🕒 July 27

Parexel

10,000+ employees

💼 Consulting

🏥 Healthcare

📦 Logistics

Senior eClinical Business Lead supporting clinical research activities to advance new treatments at Parexel. Collaborating with cross-functional teams on RTSM and DHT design and clinical trial optimization.

🕒 July 21

Renesas Electronics

10,000+ employees

🏭 Manufacturing

🏥 Healthcare

📦 Logistics

Project Manager driving development for automotive MCU products at Renesas. Collaborating with departments to ensure successful project delivery and execution.