Pre-Silicon Validation Engineer

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Logo of Weekday (YC W21)

Weekday (YC W21)

11 - 50 employees

Founded 2021

💼 Consulting

👥 HR Tech

☁️ SaaS

Consulting • HR Tech • SaaS

Weekday is a modern recruitment platform that combines AI technologies with a vast database of potential candidates, aiming to streamline the hiring process for companies in India. They offer various services, including a proactive outreach approach that helps employers connect with top talent, as well as tools for candidates to easily apply for jobs. Weekday's emphasis on candidate engagement through multiple channels, including email, WhatsApp, and phone calls, sets it apart in the competitive landscape of recruitment agencies.

📋 Description

• Perform ASIC/SoC emulation, pre-silicon validation, or verification • Work with Cadence Palladium emulation platforms • Manage Palladium compilation/build flows, including advanced clocking, ICE, and VIF flows • Develop transactors and reference models using SystemC and C/C++ • Use Python, TCL, Perl, and Shell scripting • Debug using Lauterbach, JTAG, and Coresight/UltraSoC interfaces • Validate SoC architectures and standard protocols including PCIe, DDR/LPDDR, AXI, USB, and SPI • Potentially work with additional emulation platforms, FPGA prototyping, UVM verification, networking ASICs, firmware validation, and embedded software bring-up

🎯 Requirements

• 6+ years of experience in ASIC/SoC emulation, pre-silicon validation, or verification • Strong hands-on experience with Cadence Palladium XP, Z1, Z2, or Z3 platforms • Deep understanding of Palladium compilation/build flows, advanced clocking, ICE, and VIF flows • RTL experience with Verilog, SystemVerilog, or VHDL is good to have • Strong programming skills in SystemC and C/C++ for transactor development and reference modeling • Expertise in Python, TCL, Perl, and Shell scripting • Experience with Lauterbach, JTAG, and Coresight/UltraSoC debugging tools and interfaces • Knowledge of ARM/x86 SoC architectures • Knowledge of PCIe, DDR/LPDDR, AXI, USB, and SPI protocols • Additional emulation platforms such as ZeBu, Veloce, or Protium are good to have • FPGA prototyping experience with HAPS or Xilinx is good to have • UVM verification and simulation regression debugging experience are good to have • Experience with networking ASICs, Ethernet, RDMA, RoCE, or AI fabrics is good to have • Exposure to firmware validation and embedded software bring-up is good to have

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