FPGA Verification Engineer, Air Dominance and Strike

Job not on LinkedIn

🕒 April 21

🏄 California – Remote

🏄 California – Remote

⏰ Full Time

🔴 Lead

🎯 Recruiter

Apply Now

Find Similar Remote Jobs

Receive Emails For Remote Jobs

📊 Check your resume score for this job

Improve your chances of getting an interview by checking your resume score before you apply.

Upload Resume

HIKINEX

WebsiteLinkedInAll Job Openings

201 - 500 employees

🤝 B2B

🎯 Recruiter

B2B • Recruitment

HIKINEX is a multi-channel integrated service provider that delivers outsourced sales, recruitment, virtual assistant, and marketing support to help companies scale quickly and reduce operating costs. The company offers sales-as-a-service (appointment setting, outbound sales, sales training), end-to-end recruiting and talent acquisition (sourcing, screening, ATS management, executive recruiting), virtual administrative support, and marketing/brand ambassador services. HIKINEX operates remotely out of San Francisco and emphasizes flexible, scalable staffing and operations solutions for B2B clients.

📋 Description

• Architect and implement UVM verification environments (drivers, monitors, predictors, scoreboards) for AMD (Xilinx) FPGA/SoC designs • Develop verification plans with traceability to system and hardware requirements • Author SystemVerilog Assertions (SVA) for protocol compliance and design intent checks • Build functional coverage models and drive code coverage analysis to closure • Develop constrained-random and transaction-level test sequences to maximize coverage and uncover corner-case bugs • Establish and maintain regression suites, tracking coverage metrics and verification progress • Debug failures using waveform tools and simulation logs at the HDL and system level • Collaborate with design engineers on RTL reviews, bug resolution, and micro-architecture refinement • Support hardware validation and board bring-up on target platforms • Ensure verification meets DO-254 and relevant safety standards • Author verification closure reports and coverage analysis summaries

🎯 Requirements

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field • 2+ years of experience in FPGA/ASIC verification • Proficient in SystemVerilog, UVM methodology and SVA, with experience contributing to and extending UVM testbenches • Object-oriented programming principles • Industry simulators (Questa, VCS, Xcelium, or Vivado) • Git-based collaborative workflows including code review • Linux development environments • Strong communication and teamwork skills • Eligible to obtain and hold a U.S. Secret security clearance • 5+ years of experience in FPGA/ASIC verification (Preferred) • Master’s degree in Electrical Engineering, Computer Engineering, or related field (Preferred) • DO-254, avionics verification standards for UAS, and safety-critical verification processes (Preferred) • SVUnit or equivalent unit-testing frameworks (Preferred) • Formal verification or CDC verification tools (Preferred) • Digital interfaces: Ethernet, PCIe, JESD204C, MIL-STD-1553, SPI (Preferred) • Verification automation scripting (Python, Tcl, Makefile) (Preferred) • SoC and ARM-based embedded platforms (Preferred) • Verification automation, CI/CD integration, and Nix-based build environments (Preferred)