DFT Engineer

Job not on LinkedIn

🔥 17 minutes ago

🇺🇸 United States – Remote

💵 $160k - $230k / year

⏰ Full Time

🟡 Mid-level

🟠 Senior

👷🏻‍♀️ Engineer

👻 Ghost score 0%

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Delos Data

WebsiteLinkedInAll Job Openings

11 - 50 employees

🏭 Manufacturing

💼 Consulting

📦 Logistics

Manufacturing • Consulting • Logistics

Delos Data is a company of software, system, and silicon experts building specialized interconnects and infrastructure optimized for AI inference. They focus on distributing compute and memory efficiently to make inference faster and more responsive, offering real-time visibility into always-on AI infrastructure and positioning their technology for enterprise AI deployments. Delos emphasizes inference-specific networking and hardware design rather than repurposing HPC or cloud training solutions, and they engage with the AI community at events like NVIDIA GTC.

📋 Description

• Develop, implement, and maintain RTL verification environments using UVM or equivalent methodologies • Create and execute coverage-driven verification plans aligned with design specifications • Use EDA DFT tools such as TestMax and Tessent to create and run pre-silicon test cases for MBIST and scan fabric • Develop directed test cases for non-vendor-supplied DFT logic • Assist in verifying ATPG patterns, especially at SoC level, and manufacturing reset sequences • Analyze simulation results, debug complex verification and design issues, and perform root-cause analysis with DFT design engineers • Implement and track functional and code coverage, driving verification to closure • Develop reusable verification components and write SystemVerilog Assertions • Participate in design and verification reviews, contributing to testability, correctness, and optimization • Automate regression testing and enhance verification infrastructure using Python and scripting • Contribute to continuous improvement of verification processes, tools, and methodologies • Support post-silicon test bring-up debug with DFT designers

🎯 Requirements

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field • 5+ years of experience in digital design verification, with at least 2 in DFT verification specifically • Strong hands-on experience with UVM-based or similar verification methodologies • Proficiency in SystemVerilog • Experience in scripting, preferably Python, and automation • Experience with Synopsys VCS, Siemens/Mentor Questa, or Cadence Xcelium • Experience with Synopsys TestMax + Yield Accelerator or Siemens Tessent • Solid understanding of digital design fundamentals • Experience verifying test sequences for high-speed PHY logic including PCIe and Ethernet (10G/40G/100G) • Strong analytical and problem-solving skills • Clear written and verbal communication skills for cross-functional collaboration • High attention to detail and ability to deliver reliable, high-quality verification outcomes • Ability to work independently and manage tasks to completion • Experience with change control systems, especially git • Experience verifying SoC-level designs

🏖️ Benefits

• Meaningful equity • Benefits • 401(k)