Analog Layout Engineer

Job not on LinkedIn

🔥 3 minutes ago

🤠 Texas – Remote

🤠 Texas – Remote

⏳ Contract/Temporary

🟠 Senior

🔴 Lead

👷🏻‍♀️ Engineer

👻 Ghost score 25%

What it means: the chance that no one is really hiring for this job.How to read it: 60% or higher means we think this is a ghost. Lower scores are less of a worry.How we score it: age, reposts, open roles vs team size, how fast jobs close, and whether pay is listed.Fine print: an estimate from public data, not a judgment of the company. Real jobs can score high, so treat it as a hint, not a fact.

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Inabia Solutions and Consulting, Inc.

WebsiteLinkedInAll Job Openings

51 - 200 employees

Founded 2006

💼 Consulting

📣 Marketing

📦 Logistics

Consulting • Marketing • Logistics

Inabia Solutions and Consulting, Inc. is a global business enterprise that specializes in providing IT and business solutions to organizations worldwide since 2006. With expertise in areas such as software development, cybersecurity, and artificial intelligence, Inabia focuses on empowering businesses through innovative technology and tailored consulting services. The company prides itself on connecting organizations with top-tier talent and delivering high-quality managed services to enhance operational efficiency and drive growth.

📋 Description

• Design physical silicon layouts for high-frequency or high-speed mixed-signal circuits • Create block-level and chip-top-level floor plans • Manage hierarchical block integration • Handle micro-bump or package-aware co-design • Address layout-dependent effects, device matching, common-centroid structures, guard rings, and isolation or shielding • Ensure closure on DRC, LVS, ERC, antenna rules, EM/IR reliability, and ESD protection

🎯 Requirements

• 7+ years of relevant experience required • Generally 5 to 12+ years of hands-on custom IC layout experience in deep sub-micron or advanced CMOS/FinFET nodes • Experience at lower nodes (N3, N5) is critical • TSMC 4NM experience is a must-have • Expertise in high-speed analog layout for mixed-signal circuits such as SerDes, ADCs, DACs, PLLs, and high-speed blocks • Experience with block-level and chip-top-level floor planning • Experience managing hierarchical block integration • Experience with micro-bump or package-aware co-design • Knowledge of layout-dependent effects (LOD, WPE, LDE) • Knowledge of device matching and common-centroid structures • Experience with guard rings and isolation or shielding, including coaxial, differential, and ground shields • Experience ensuring closure on DRC, LVS, ERC, antenna rules, EM/IR reliability, and ESD protection • Must be authorized to work under an eligible visa status; H1B transfers are excluded

🏖️ Benefits

• Remote work arrangement • Contract engagement • All visa types accepted except H1B transfer • C2C engagements are allowed

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